Software programming tool
LMK61E2
Ultra-low jitter, EEPROM programmable oscillator for medical imaging and test and measurement
Data sheet
LMK61E2
- Ultra-Low Noise, High Performance
- Jitter: 90fs RMS Typical fOUT > 100MHz
- PSRR: –70dBc, Robust Supply Noise Immunity
- Flexible Output Format; User Selectable
- LVPECL up to 1GHz
- LVDS up to 900MHz
- HCSL up to 400MHz
- Total Frequency Tolerance of ±50ppm
- System Level Features
- Frequency Margining: Fine and Coarse
- Internal EEPROM: User Configurable Default Settings
- Other Features
- Device Control: I2C
- 3.3V Operating Voltage
- Industrial Temperature Range (–40°C to +85°C)
- 7mm × 5mm 8-Pin Package
- Create a Custom Design Using the LMK61E2 With the WEBENCH Power Designer
The LMK61E2 device is an ultra-low jitter PLLatinum™ programmable oscillator with a fractional-N frequency synthesizer with integrated VCO that generates commonly used reference clocks. The outputs can be configured as LVPECL, LVDS, or HCSL.
The device features self start-up from on-chip EEPROM that is factory programmed to generate 156.25MHz LVPECL output. The device registers and EEPROM settings are fully programmable in-system through I2C serial interface. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3V ± 5% supply.
The device provides fine and coarse frequency margining options through I2C serial interface to support system design verification tests (DVT), such as standard compliance and system timing margin testing.
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Technical documentation
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Many TI reference designs include the LMK61E2
Use our reference design selection tool to review and identify designs that best match your application and parameters.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| QFM (SIA) | 8 | Ultra Librarian |
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