JAJSFA9E November 2011 – April 2018 ADS5294
PRODUCTION DATA.
PARAMETERS | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
DIGITAL INPUTS/OUTPUTS | ||||||
VIH | Logic high input voltage | All digital inputs support 1.8-V and 3.3-V CMOS logic levels. | 1.3 | V | ||
VIL | Logic low input voltage | 0.4 | V | |||
IIH | Logic high input current | VHIGH = 1.8 V | 6 | µA | ||
IIL | Logic low input current | VLOW = 0 V | < 0.1 | µA | ||
VOH | Logic high output voltage | AVDD - 0.1 | V | |||
VOL | Logic low output voltage | 0.2 | V | |||
LVDS OUTPUTS (see Figure 2) | ||||||
VODH | High-level output differential voltage | 100-Ω external termination | 245 | 350 | 405 | mV |
VODL | Low-level output differential voltage | 100-Ω external termination | –245 | –350 | –405 | mV |
VOCM | Output common-mode voltage | 900 | 1100 | 1300 | mV |