For systems needing higher current than supported by a single TPS1689x, it is possible to connect TPS1689x in parallel with one or more TPS1685x devices to deliver the desired total system current. Conventional eFuses do not share current evenly between themselves during steady-state due to mismatches in the path resistances (which includes the individual device R_DSON variation from part to part, as well as the parasitic PCB trace resistance). This fact can lead to multiple problems in the system:

1. Some devices always carry higher current as compared to other devices, which can result in accelerated failures in those devices and an overall reduction in system operational lifetime.

2. As a result, thermal hotspots form on the board, devices, traces, and vias carrying higher current, leading to reliability concerns for the PCB. In addition, this problem makes thermal modeling and board thermal management more challenging for designers.

3. The devices carrying higher current can hit their individual circuit-breaker threshold prematurely even while the total system load current is lower than the overall circuit-breaker threshold. This action can lead to false tripping of the eFuse chain during normal operation. This has the effect of lowering the current-carrying capability of the parallel chain. In other words, the current rating of the parallel eFuse chain needs to be de-rated as compared to the sum of the current ratings of the individual eFuses. This de-rating factor is a function of the path resistance mismatch, the number of devices in parallel, and the individual eFuse circuit-breaker accuracy.

The need for de-rating has an adverse impact on the system design. The designer is forced to make one of these trade-offs:

1. Limit the operating load current of the system to below the derated overcurrent threshold of the eFuse chain. Essentially, it means lower platform capabilities than are supported by the power supply (PSU).

2. Increase the overall circuit-breaker threshold to allow the desired system load current to pass through without tripping. As a consequence, the power supply (PSU) must be oversized to deliver higher currents during faults to account for the degradation of the overall circuit-breaker accuracy.

In either case, the system suffers from poor power supply utilization, which can mean sub-optimal system throughput or increased installation and operating costs, or both.

The TPS1689x and TPS1685x devices use a proprietary technique to address these problems and provide unlimited scalability by paralleling as many eFuses as needed. This is incorporated without significant current imbalance or any degradation in accuracy.

For this scheme to work correctly, the devices must be connected in the following manner:

• The SWEN pins of all the devices are connected together.

• The IMON pins of all the devices need to be connected together. The R_IMON resistor value on the combined IMON pin can be calculated using Equation 8.

  Equation 8. $R_{IMON}=\frac{V_{IREF}}{G_{IMON}\times I_{OCP\left(TOTAL\right)}}$

• The IREF pins of all the devices need to be connected together. The TPS1689x generates the V_IREF reference voltage for the whole chain using its internal DAC which can be programmed using PMBus® writes to the VIREF register. This allows the overcurrent protection thresholds to be dynamically adjusted during system operation. It is also possible to drive the IREF pin using a low impedance external precision voltage reference.

• The start-up current limit and active current sharing threshold for each device is fixed to I_start-up. Each device will limit it to this value should the current try to exceed I_start-up.