SLVSHO1A March   2025  – December 2025 TPS1689

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Telemetry
    7. 6.7  PMBus and GPIO DC Characteristics
    8. 6.8  Logic Interface
    9. 6.9  Timing Requirements
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Undervoltage Protection
      2. 7.3.2  Insertion Delay
      3. 7.3.3  Overvoltage Protection
      4. 7.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.4.1 Slew rate (dVdt) and Inrush Current Control
          1. 7.3.4.1.1 Start-Up Timeout
        2. 7.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 7.3.4.3 Active Current Limiting During Start-Up
        4. 7.3.4.4 Short-Circuit Protection
      5. 7.3.5  Analog Load Current Monitor (IMON)
      6. 7.3.6  Overtemperature Protection
      7. 7.3.7  Analog Junction Temperature Monitor (TEMP)
      8. 7.3.8  FET Health Monitoring
      9. 7.3.9  Single Point Failure Mitigation
        1. 7.3.9.1 IMON Pin Single Point Failure
        2. 7.3.9.2 IREF Pin Single Point Failure
      10. 7.3.10 General Purpose Digital Input/Output Pins
        1. 7.3.10.1 Fault Response and Indication (FLT)
        2. 7.3.10.2 Power Good Indication (PG)
        3. 7.3.10.3 Parallel Device Synchronization (SWEN)
      11. 7.3.11 Stacking Multiple eFuses for Unlimited Scalability
        1. 7.3.11.1 Current Balancing During Start-Up
      12. 7.3.12 Quick Output Discharge(QOD)
      13. 7.3.13 Write Protect Feature(WP#)
      14. 7.3.14 PMBus® Digital Interface
        1. 7.3.14.1  PMBus® Device Addressing
        2. 7.3.14.2  SMBus Protocol
        3. 7.3.14.3  SMBus™ Message Formats
        4. 7.3.14.4  Packet Error Checking
        5. 7.3.14.5  Group Commands
        6. 7.3.14.6  SMBus™ Alert Response Address (ARA)
        7. 7.3.14.7  PMBus® Commands
          1. 7.3.14.7.1 Detailed Descriptions of PMBus® Commands
            1. 7.3.14.7.1.1  OPERATION (01h, Read/Write Byte)
            2. 7.3.14.7.1.2  CLEAR_FAULTS (03h, Send Byte)
            3. 7.3.14.7.1.3  RESTORE_FACTORY_DEFAULTS (12h, Send Byte)
            4. 7.3.14.7.1.4  STORE_USER_ALL (15h, Send Byte)
            5. 7.3.14.7.1.5  RESTORE_USER_ALL (16h, Send Byte)
            6. 7.3.14.7.1.6  BB_ERASE (F5h, Send Byte)
            7. 7.3.14.7.1.7  FETCH_BB_EEPROM (F6h, Send Byte)
            8. 7.3.14.7.1.8  CLEAR_BB_RAM (FCh, Send Byte)
            9. 7.3.14.7.1.9  POWER_CYCLE (D9h, Send Byte)
            10. 7.3.14.7.1.10 MFR_WRITE_PROTECT (F8h, Read/Write Byte)
            11. 7.3.14.7.1.11 CAPABILITY (19h, Read Byte)
            12. 7.3.14.7.1.12 STATUS_BYTE (78h, Read Byte)
            13. 7.3.14.7.1.13 STATUS_WORD (79h, Read Word)
            14. 7.3.14.7.1.14 STATUS_OUT (7Ah, Read Byte)
            15. 7.3.14.7.1.15 STATUS_IOUT (7Bh, Read Byte)
            16. 7.3.14.7.1.16 STATUS_INPUT (7Ch, Read Byte)
            17. 7.3.14.7.1.17 STATUS_TEMP (7Dh, Read Byte)
            18. 7.3.14.7.1.18 STATUS_CML (7Eh, Read Byte)
            19. 7.3.14.7.1.19 STATUS_MFR_SPECIFIC (80h, Read Byte)
            20. 7.3.14.7.1.20 STATUS_MFR_SPECIFIC_2 (F3h, Read Word)
            21. 7.3.14.7.1.21 PMBUS_REVISION (98h, Read Byte)
            22. 7.3.14.7.1.22 MFR_ID (99h, Block Read)
            23. 7.3.14.7.1.23 MFR_MODEL (9Ah, Block Read)
            24. 7.3.14.7.1.24 MFR_REVISION (9Bh, Block Read)
            25. 7.3.14.7.1.25 READ_VIN (88h, Read Word)
            26. 7.3.14.7.1.26 READ_VOUT (8Bh, Read Word)
            27. 7.3.14.7.1.27 READ_IIN (89h, Read Word)
            28. 7.3.14.7.1.28 READ_TEMPERATURE_1 (8Dh, Read Word)
            29. 7.3.14.7.1.29 READ_VAUX (D0h, Read Word)
            30. 7.3.14.7.1.30 READ_PIN (97h, Read Word)
            31. 7.3.14.7.1.31 READ_EIN (86h, Block Read)
            32. 7.3.14.7.1.32 READ_VIN_AVG (DCh, Read Word)
            33. 7.3.14.7.1.33 READ_VIN_MIN (D1h, Read Word)
            34. 7.3.14.7.1.34 READ_VIN_PEAK (D2h, Read Word)
            35. 7.3.14.7.1.35 READ_VOUT_AVG (DDh, Read Word)
            36. 7.3.14.7.1.36 READ_VOUT_MIN (DAh, Read Word)
            37. 7.3.14.7.1.37 READ_IIN_AVG (DEh, Read Word)
            38. 7.3.14.7.1.38 READ_IIN_PEAK (D4h, Read Word)
            39. 7.3.14.7.1.39 READ_TEMP_AVG (D6h, Read Word)
            40. 7.3.14.7.1.40 READ_TEMP_PEAK (D7h, Read Word)
            41. 7.3.14.7.1.41 READ_PIN_AVG (DFh, Read Word)
            42. 7.3.14.7.1.42 READ_PIN_PEAK (D5h, Read Word)
            43. 7.3.14.7.1.43 READ_SAMPLE_BUF (D8h, Block Read)
            44. 7.3.14.7.1.44 READ_BB_RAM (FDh, Block Read)
            45. 7.3.14.7.1.45 READ_BB_EEPROM (F4h, Block Read)
            46. 7.3.14.7.1.46 BB_TIMER (FAh, Read Byte)
            47. 7.3.14.7.1.47 PMBUS_ADDR (FBh, Read/Write Byte)
            48. 7.3.14.7.1.48 VIN_UV_WARN (58h, Read/Write Word)
            49. 7.3.14.7.1.49 VIN_UV_FLT (59h, Read/Write Word)
            50. 7.3.14.7.1.50 VIN_OV_WARN (57h, Read/Write Word)
            51. 7.3.14.7.1.51 VIN_OV_FLT (55h, Read/Write Word)
            52. 7.3.14.7.1.52 VOUT_UV_WARN (43h, Read/Write Word)
            53. 7.3.14.7.1.53 VOUT_PGTH (5Fh, Read/Write Word)
            54. 7.3.14.7.1.54 OT_WARN (51h, Read/Write Word)
            55. 7.3.14.7.1.55 OT_FLT (4Fh, Read/Write Word)
            56. 7.3.14.7.1.56 PIN_OP_WARN (6Bh, Read/Write Word)
            57. 7.3.14.7.1.57 IIN_OC_WARN (5Dh, Read/Write Word)
            58. 7.3.14.7.1.58 ALERT_MASK (DBh, Read/Write Word)
            59. 7.3.14.7.1.59 VIREF (E0h, Read/Write Byte)
            60. 7.3.14.7.1.60 AUX/TEMP/EEDATA/EECLK/GPIOx (E1h, Read/Write Byte)
            61. 7.3.14.7.1.61 SMBA_FLT_CONFIG (E2h, Read/Write Byte)
            62. 7.3.14.7.1.62 FAULT_MASK (E3h, Read/Write Word)
            63. 7.3.14.7.1.63 DEVICE_CONFIG (E4h, Read/Write Word)
            64. 7.3.14.7.1.64 BB_CONFIG (E5h, Read/Write Byte)
            65. 7.3.14.7.1.65 OC_TIMER (E6h, Read/Write Byte)
            66. 7.3.14.7.1.66 RETRY_CONFIG (E7h, Read/Write Byte)
            67. 7.3.14.7.1.67 ADC_CONFIG_1 (E8h, Read/Write Byte)
            68. 7.3.14.7.1.68 ADC_CONFIG_2 (E9h, Read/Write Byte)
            69. 7.3.14.7.1.69 PK_MIN_AVG (EAh, Read/Write Byte)
            70. 7.3.14.7.1.70 PSU_VOLTAGE (ECh, Read/Write Byte)
            71. 7.3.14.7.1.71 CABLE_DROP (EDh, Read/Write Byte)
            72. 7.3.14.7.1.72 IMON OFFSET CALIBRATION (F2h, Read/Write Byte)
            73. 7.3.14.7.1.73 INS_DLY (F9h, Read/Write Byte)
        8. 7.3.14.8  Analog-to-Digital Converter
        9. 7.3.14.9  Digital-to-Analog Converters
        10. 7.3.14.10 DIRECT Format Conversion
        11. 7.3.14.11 Blackbox Fault Recording
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Standalone Operation
      2. 8.1.2 Single TPS1689x and Multiple TPS1685 Devices, Parallel Connection
      3. 8.1.3 Multiple TPS1689x Devices: Parallel Connection With Individual Telemetry
      4. 8.1.4 Multiple Devices, Independent Operation (Multi-zone)
    2. 8.2 Typical Application: 54V, 2kW Power Path Protection with PMBus® Interface in Datacenter Servers
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Performance Plots
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Transient Protection and Other Design Considerations
      2. 8.3.2 Output Short-Circuit Measurements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
7.3.14.7.1.13 STATUS_WORD (79h, Read Word)

STATUS_WORD is a standard PMBus® command that returns two bytes of information with a summary of the eFuse fault conditions.

This command uses the PMBus® read word protocol.

To clear the bits in this register, the underlying faults must be removed and the CLEAR_FAULTS command must be issued by the host controller.

The low byte of STATUS_WORD is the same register as the STATUS_BYTE command. The STATUS_WORD register contents are described in Figure 7-16 and Table 8-67.

TPS1689 Status Register Bit Map Figure 7-16 Status Register Bit Map.

Table 7-11 STATUS_WORD Register Description
Bit Name

Value

Description

Default

Access

15

OUT_STATUS

OUTPUT fault status

Read

1

Active bits set in the STATUS_OUT register

0

0

 No active bits set in the STATUS_OUT register

14

IOUT_STATUS

IOUT fault status

1

Active bits set in the STATUS_IOUT register

0

0

No active bits set in the STATUS_IOUT register

13

INPUT_STATUS

INPUT fault status

1

Active bits set in the STATUS_INPUT register

0

0

No active bits set in the STATUS_INPUT register

12

MFR_STATUS

Manufacturer specific fault status

1

Active bits set in the STATUS _MFR_SPECIFIC register

0

0

No active bits set in the STATUS _MFR_SPECIFIC register

11

PGOODB

Power Good status

1

PGOOD de-asserted

1

0

PGOOD asserted

10:9

Reserved

00

Reserved

00

8

UNKNOWN

1

An event other than the ones listed in bits 15:1 has occurred

0

0

An event other than the ones listed in bits 15:1 has not occurred

7:0

Same as STATUS_BYTE register

Figure 7-17 depicts the relationship between the STATUS_BYTE register, the STATUS_WORD register and the more detailed status registers.

Based on the information in these bytes, the host can get more insight by reading the appropriate status registers.

TPS1689 Summary of the Status Registers Figure 7-17 Summary of the Status Registers.