• Determining the number of eFuse devices to be used in parallel

  As the design must have PMBus® functionality or interface for telemetry, control, and configuration, the TPS1689x eFuse must be used as a primary device in parallel with TPS1685x eFuse(s) as secondary devices in order to support the required steady-state thermal design current. By factoring in a small variation in the junction to ambient thermal resistance (R_θJA), each TPS1689x eFuse and TPS1685x eFuse is rated at maximum RMS currents of 20A and 20A respectively with a maximum junction temperature of 125°C. Therefore, Equation 20 can be used to calculate the number of TPS1685x eFuses (N-1) to be in parallel with a TPS1689x eFuse to support the maximum steady state DC load current (I_LOAD(max)), for which the solution must be designed.
  Equation 20. $\left(N-1\right)\ge \frac{\left(I_{OUT\left(max\right)}-20\right) }{20}$

  According to Table 8-67, I_OUT(max) is 40A. Therefore, one (1) TPS1689x and one(1) TPS1685x eFuses are connected in parallel to support the desired steady-state load current.

• Setting up the primary and secondary devices in a parallel combination of TPS1689x and TPS1685x eFuses

  The TPS1689x functions as a primary device by default. By connecting the MODE pin of all the TPS1685x eFuses to GND, they are configured as secondary devices.

• Selecting the V_IREF to set the reference voltage for overcurrent protection and active current sharing

  The reference voltage (V_IREF) for overcurrent protection and active current sharing will be at 1V by default. However, it can be programmed via PMBus® using the VIREF register if another reference voltage is needed in the range of 0.3V to 1.2V. When the voltage at the IMON pin (V_IMON) is used as an input to an ADC to monitor the system current or to implement the Platform Power Control (Intel PSYS) functionality inside the VR controller, V_IREF must be set to half of the maximum voltage range of the ISYS_IN input of the controller. This action provides the necessary headroom and dynamic range for the system to accurately monitor the load current up to the fast-trip threshold (2 × I_OCP(TOTAL)). For improved noise immunity, place a 1nF ceramic capacitor from the IREF pin to GND.

  Note:

  Maintain V_IREF within the recommended voltage to ensure proper operation of overcurrent detection circuit.

• Selecting the R_IMON resistor to set the overcurrent (circuit-breaker) and fast-trip thresholds during steady-state

  TPS1689x eFuse responds to the output overcurrent conditions during steady-state by turning off the output after a user-adjustable transient fault blanking interval. This eFuse continuously senses the total system current (I_OUT) and produces a proportional analog current output (I_IMON) on the IMON pin. This generates a voltage (V_IMON) across the IMON pin resistor (R_IMON) in response to the load current, which is defined as Equation 21.

  Equation 21. $V_{IMON}=I_{OUT}\times G_{IMON}\times R_{IMON}$

  G_IMON is the current monitor gain (I_IMON : I_OUT), whose typical value is 18.23µA/A. The overcurrent condition is detected by comparing the V_IMON against the V_IREF as a threshold. The circuit-breaker threshold during steady-state (I_OCP(TOTAL)) can be calculated using Equation 22.

  Equation 22. $I_{OCP\left(TOTAL\right)}=\frac{V_{IREF}}{G_{IMON}\times R_{IMON}}$

  In this design example, I_OCP(TOTAL) is considered to be around 44A. Hence, I_OCP(TOTAL) is required to be set at 44A, and R_IMON can be calculated to be 1246.6Ω with G_IMON as 18.23µA/A and V_IREF as 1V. The value of R_IMON chosen is 1240Ω with 0.1% tolerance and power rating of 100mW. This results in a circuit-breaker threshold of 44.2A. For noise immunity, place a 22pF ceramic capacitor from the IMON pin to GND.

  Note:

  The total system output current (I_OUT) must be considered when selecting R_IMON, not the current carried by each individual device.

• Selecting the R_ILIM resistor to set the active sharing threshold during steady-state

  R_ILIM is used in setting up the active current sharing threshold during steady state among the devices in a parallel chain. Each device continuously monitors the current flowing through it (I_DEVICE) and outputs a proportional analog output current on its own ILIM pin. This in turn produces a proportional voltage (V_ILIM) across the respective ILIM pin resistor (R_ILIM), which is expressed as Equation 23.

  Equation 23. $V_{ILIM}=I_{DEVICE}\times G_{ILIM}\times R_{ILIM}$

  G_ILIM is the current monitor gain (I_ILIM : I_DEVICE), whose typical value is 18.24μA/A.

  • Active current sharing during steady-state: This mechanism operates only after the device reaches steady-state and acts independently by comparing its own load current information (V_ILIM) with the Active Current Sharing reference (CLREF_LIN) threshold, defined as Equation 24.

  • Equation 24. ${CLREF}_{LIN}=\frac{1.1\times V_{IREF}}{3}$
    Therefore, RILIM must be calculated using Equation 25 to define the active current sharing threshold as IOCP(TOTAL)/N, where N is the number of devices in parallel. Using N = 2, RIMON = 1240Ω, and Equation 25 , RILIM can be calculated to be 909.3Ω. The closest standard value of 909Ω with 0.1% tolerance and power rating of 100mW resistances are selected as RILIM for each device.
  Equation 25. $R_{ILIM}=\frac{1.1\times N\times R_{IMON}}{3}$

• Selecting the overcurrent blanking timer duration (t_{OC_TIMER})

  The overcurrent blanking timer duration (t_{OC_TIMER}) for the entire parallel chain is controlled by TPS1689x and is set to 3.2ms by default. However, it can be programmed via PMBus® using the OC_TIMER (E6h) register to a different value . The ITIMER pin for all the secondary TPS1685x devices must be left open.

• Selecting the resistors to set the undervoltage lockout threshold

The undervoltage lockout (UVLO) threshold is adjusted by employing the external voltage divider network of R1 and R2 connected between IN, EN/UVLO, and GND pins of the device as described in Section 7.3.1 section. The resistor values required for setting up the UVLO threshold are calculated using Equation 27. To minimize the input current drawn from the power supply, TI recommends using higher resistance values for R1 and R2. From the device electrical specifications, UVLO rising threshold V_UVLO(R) = 1.2V. From the design requirements, VIN_UVLO = 46V. First choose the value of R1 = 3.74MΩ and use Equation 27 to calculate R2 = 100kΩ. Use the closest standard 1 % resistor values: R1 = 3.74MΩ and R2 = 100kΩ. For noise reduction, place a 100pF ceramic capacitor across the EN/UVLO pin and GND.

• Equation 27. $V_{IN\left(UV\right)}=V_{UVLO\left(R\right)}\frac{R_1+R_2}{R_2}$

• Selecting the resistors to set the overvoltage lockout threshold

  The overvoltage lockout (OVLO) threshold is adjusted by employing the external voltage divider network of R3 and R4 connected between IN, OVLO, and GND pins of the device as described in overvoltage protection section. The resistor values required for setting up the OVLO threshold are calculated using below equation.

• Equation 28. $V_{IN\left(OV\right)}=V_{OVLO\left(R\right)}\frac{R_1+R_2}{R_2}$

  To minimize the input current drawn from the power supply, TI recommends using higher resistance values for R3 and R4. From the device electrical specifications, OVLO rising threshold V_OVLO(R) = 1.164V. From the design requirements, VIN_OVLO = 60V. First choose the value of R1 = 5.11MΩ and use Equation 27to calculate R3 = 101kΩ. Use the closest standard 1% resistor values: R3 = 5.11MΩ and R4 = 102kΩ. For noise reduction, place a 10pF ceramic capacitor across the OVLO pin and GND.

• Selecting the R-C filter between VIN and VDD for TPS1689x and TPS1685x

  VDD pin is intended to power the internal control circuitry of the eFuse with a filtered and stable supply, not affected by system transients. Therefore, use an R (150Ω) – C (0.22µF) filter from the input supply (IN pin) to the VDD pin. This helps to filter out the supply noises and to hold up the controller supply during severe faults such as short-circuit at the output. In a parallel chain, this R-C filter must be employed for each device.

• Selecting the pullup resistors for PMBus® SCL, SDA, and SMBA lines

  The SCL, SDA, and SMBA lines can be pulled up to potentials less than 5V in general with pull-up resistors of 10kΩ. However, to obtain the appropriate values of these pull-up resistors in accordance with the system specifications, please refer to I2C Bus Pullup Resistor Calculation.

• Configuring the PMBus® target device address

  Place appropriate resistors across ADDR0 and ADDR1 to GND or leave these pins floating or connect them to GND as described in Section 7.3.14.1 to set the preferred device address. To improve the noise immunity for correct address decoding, connect 10pF ceramic capacitors in parallel with the resistors on ADDR0 and ADDR1.

• Selection of TVS diode at input and Schottky diode at output

  In the case of a short circuit and overload current limit when the device interrupts a large amount of current instantaneously, the input inductance generates a positive voltage spike on the input, whereas the output inductance creates a negative voltage spike on the output. The peak amplitudes of these voltage spikes (transients) are dependent on the value of inductance in series with the input or output of the device. Such transients can exceed the absolute maximum ratings of the device and eventually lead to failures due to electrical overstress (EOS) if appropriate steps are not taken to address this issue. Typical methods for addressing this issue include:

  1. Minimize lead length and inductance into and out of the device.

  2. Use a large PCB GND plane.

  3. Addition of the Transient Voltage Suppressor (TVS) diodes to clamp the positive transient spike at the input.

  4. Using Schottky diodes across the output to absorb negative spikes.

  Refer to TVS Clamping in Hot-Swap Circuits and Selecting TVS Diodes in Hot-Swap and ORing Applications for details on selecting an appropriate TVS diode and the number of TVS diodes to be in parallel to effectively clamp the positive transients at the input below the absolute maximum ratings of the IN pin (90V). These TVS diodes also help to limit the transient voltage at the IN pin during the Hot Plug event. 2, SMDJ54A are used in parallel in this design example.

  Note:

  Maximum Clamping Voltage V_C specification of the selected TVS diode at I_pp (10/1000μs) (V) must be lower than the absolute maximum rating of the power input (IN) pin for safe operation of the eFuse.

  Selection of the Schottky diodes must be based on the following criteria:

  • The non-repetitive peak forward surge current (I_FSM) of the selected diode must be more than the fast-trip threshold . Two or more Schottky diodes in parallel must be used if a single Schottky diode is unable to meet the required I_FSM rating. Equation 29 calculates the number of Schottky diodes (N_Schottky) that must be used in parallel.

    Equation 29. $N_{Schottky}>\frac{I_{SFT}}{I_{FSM}}$

  • Forward Voltage Drop (V_F) at near to I_FSM must be as small as possible. Ideally, the negative transient voltage at the OUT pin must be clamped within the absolute maximum rating of the OUT pin (-5V).

  • DC Blocking Voltage (V_RM) must be more than the maximum input operating voltage.

  • Leakage current (I_R) must be as small as possible.

  2, B360-13-F are used in parallel in this design example.

• Selecting C_IN and C_OUT

  TI recommends to add ceramic bypass capacitors to help stabilize the voltages on the input and output. The value of C_IN must be kept small to minimize the current spike during hot-plug events. For each device, 10nF of C_IN is a reasonable target. Because C_OUT does not get charged during hot-plug, a larger value such as 10µF can be used at the OUT pin of each device.

• Load turn-ON sequence

  Starting up into large capacitive loads combined with active load current can increase inrush and may lead to thermal shutdown during startup. To minimize this risk, TI recommends using the PGOOD signal to enable downstream loads. This sequencing allows the eFuse to charge the capacitive load first before connecting the active load, ensuring a smooth and reliable startup.