Product details


Number of supplies monitored 1 Threshold voltage 1 (Typ) (V) 2.93, 4.55 Features Watchdog timer, Window watchdog Reset threshold accuracy (%) 2.4 Output driver type/reset output Active-low, Open-drain Time delay (ms) 25 TI functional safety category Functional Safety-Capable Rating Automotive Watchdog timer WDI (sec) Programmable Operating temperature range (C) -40 to 125 open-in-new Find other Supervisor & reset ICs

Package | Pins | Size

SOT-23 (DBV) 6 5 mm² 1.60 x 2.90 open-in-new Find other Supervisor & reset ICs


  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM classification level 2
    • Device CDM classification level C4B
  • Window-watchdog with programmable delay and window ratio
  • 6-Pin SOT-23 package
  • Supply current of 9 µA (Typ)
  • Power-on reset generator with a fixed delay time of 25 ms
  • Precision supply-voltage monitor:
    2.5 V, 3 V, 3.3 V, 5 V
  • Open-Drain Reset Output
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The TPS3813-Q1 supervisory circuits provide circuit initialization and timing supervision, primarily for DSPs and processor-based systems.

During power on, the RESET pin is asserted when the supply voltage (VDD) becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDD and keeps the RESET pin active as long as VDD remains below the threshold voltage (VIT).

An internal timer delays the return of the output to the inactive (high) state to ensure proper system reset. The delay time, td = 25 ms typical, begins after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider.

For safety-critical applications, the TPS3813-Q1 family of devices incorporate a window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting the WDT pin to GND or VDD, or by using an external capacitor. The lower limit, and thus the window ratio, is set by connecting the WDR pin to GND or VDD. The RESET pin will assert a reset to the microcontroller if the watchdog is incorrectly serviced.

The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The devices are available in a 6-pin SOT-23 package. The devices are characterized for operation over a temperature range of –40°C to 125°C.

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Technical documentation

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Type Title Date
* Data sheet TPS3813-Q1 Processor Supervisory Circuits With Window-Watchdog datasheet (Rev. G) Oct. 11, 2019
Functional safety information TPS3813-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA Nov. 25, 2020
Application note Voltage Supervisors (Reset ICs): Frequently Asked Questions (FAQs) (Rev. A) Mar. 17, 2020
Functional safety information TPS3813-Q1 Functional Safety FIT Rate and Failure Mode Distribution Dec. 18, 2019
E-book Voltage Supervisor and Reset ICs: Tips, Tricks and Basics Jun. 28, 2019
Application note Window Watchdog Calculator for TPS3813 Voltage Supervisors (Rev. A) Sep. 13, 2016
Application note All Window Watchdog Supervisors Sep. 09, 2009

Design & development

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Hardware development

document-generic User guide
The TPS3813-Q1 device is a processor supervisory circuit with watchdog functionality for applications that use DSPs, microcontrollers (MCUs) or microprocessors, or are safety critical. The incorporated window watchdog allows for programmable delay and window ratio that can realease a (...)
  • Major pins of the device are broken out into onboard test points
  • Onboard test point to exercise watchdog functionality
  • Onboard jumpers for easy IC configuration and attachement for probes
  • Q200-qualified passives in EVM solution

Design tools & simulation

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PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

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SOT-23 (DBV) 6 View options

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