Product details


Output options Adjustable Output Iout (Max) (A) 0.5 Vin (Max) (V) 5.5 Vin (Min) (V) 0.8 Vout (Max) (V) 3.6 Vout (Min) (V) 0.8 Noise (uVrms) 20 Iq (Typ) (mA) 1 Thermal resistance θJA (°C/W) 42 Load capacitance (Min) (µF) 2.2 Rating Catalog Regulated outputs (#) 1 Features Enable, Power Good, Soft Start Accuracy (%) 2 PSRR @ 100 KHz (dB) 27 Dropout voltage (Vdo) (Typ) (mV) 50 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

VSON (DRC) 10 9 mm² 3 x 3 VSON (DRC) 10 9 mm² 3.00 x 3.00 open-in-new Find other Linear regulators (LDO)


  • VOUT Range: 0.8 V to 3.6 V
  • Ultralow VIN Range: 0.8 V to 5.5 V
  • VBIAS Range 2.7 V to 5.5 V
  • Low Dropout: 50 mV Typically at 500 mA, VBIAS = 5 V
  • Power Good (PG) Output Allows Supply Monitoring or Provides a Sequencing Signal for Other Supplies
  • 2% Accuracy Over Line, Load, and Temperature
  • Programmable Soft-Start Provides Linear Voltage Start-Up
  • VBIAS Permits Low VIN Operation With Good Transient Response
  • Stable With Any Output Capacitor ≥ 2.2 μF
  • Available in a Small 3-mm × 3-mm × 1-mm 10-Pin Package
    • FPGA Applications
    • DSP Core and I/O Voltages
    • Post-Regulation Applications
    • Applications With Special Start-Up Time or Sequencing Requirements
    • Hot-Swap and Inrush Controls
  • open-in-new Find other Linear regulators (LDO)


    The TPS74701 low-dropout (LDO) linear regulator provides an easy-to-use, robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and ASICs. The enable input and power good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

    A precision reference and error amplifier deliver 2% accuracy over load, line, temperature, and process. The device is stable with any type of capacitor greater than or equal to 2.2 μF, and is fully specified from –40°C to 125°C. The TPS74701 is offered in a small 3-mm × 3-mm SON-10 package for compatibility with the TPS74801.

    For all available packages, see the orderable addendum at the end of the data sheet.
    open-in-new Find other Linear regulators (LDO)
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    Technical documentation

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    Type Title Date
    * Data sheet TPS74701 500-mA Low-Dropout Linear Regulator With Programmable Soft-Start datasheet (Rev. G) Oct. 29, 2015
    Application note LDO Noise Demystified (Rev. B) Aug. 18, 2020
    Application note Using Thermal Calculation Tools for Analog Components (Rev. A) Aug. 30, 2019
    Application note A Topical Index of TI LDO Application Notes (Rev. F) Jun. 27, 2019
    Technical article LDO basics: capacitor vs. capacitance Aug. 01, 2018
    Technical article LDO Basics: Preventing reverse current Jul. 25, 2018
    Selection guide Power Management Guide 2018 (Rev. R) Jun. 25, 2018
    Technical article LDO basics: introduction to quiescent current Jun. 20, 2018
    Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) Mar. 21, 2018
    Application note LDO PSRR Measurement Simplified (Rev. A) Aug. 09, 2017
    Technical article LDO basics: noise – part 1 Jun. 14, 2017
    White paper Minimum Power Specifications for High-Performance ADC Power-Supply Designs Mar. 31, 2016
    Application note Simple Power Solution Using LDOs for the DM365 (Rev. A) Sep. 11, 2009
    Application note Simple Power Solution Using LDOs for the DM365 Aug. 04, 2009
    Application note Simple Power Solution Using LDOs For TMS320C2834x MCU Jul. 24, 2009
    User guide TPS74701EVM-177 and TPS74801EVM-177 User's Guide (Rev. A) Dec. 04, 2007

    Design & development

    For additional terms or required resources, click any title below to view the detail page where available.

    Hardware development


    The J6Entry/RSP EVM is an evaluation platform designed to speed up development efforts and reduce time to market for applications such as Infotainment, reconfigurable Digital Cluster or Integrated Digital Cockpit.

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    document-generic User guide

    The TMS320DM36x Digital Video Evaluation Module (DVEVM) enables developers to start immediate evaluation of TI’s Digital Media (DMx) processors and begin building digital video applications such as IP security cameras, action cameras, drones, wearables, digital signage, video doorbells, and (...)

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    • Other (...)
    TPS74701 Evaluation Module
    document-generic User guide

    The TPS74701EVM-177 facilitates evaluation of the TPS74701 low-dropout linear regulator IC.

    • Ultra-Low VIN and VOUT Range: 0.8 V to 5.5 V
    • VBIAS Range 2.7 V to 5.5 V
    • Low Dropout: 50mV typ at 500mA, VBIAS = 5 V
    • Power Good (PG) Output Allows Supply Monitoring or Provides a Sequencing Signal for Other Supplies
    • Available in a Small 3mm x 3mm x 1mm SON-10 Package
    • 2% Accuracy Over Line/Load/Temperature
    • (...)

    Design tools & simulation

    SBVM632.ZIP (3 KB) - PSpice Model
    SLIM033B.ZIP (58 KB) - PSpice Model
    SLIM252.ZIP (35 KB) - TINA-TI Spice Model
    SLIM253.TSC (94 KB) - TINA-TI Reference Design

    Reference designs

    Copper-to-fiber 100BASE-FX or 1000BASE-X media converter reference design for grid applications
    TIDA-00306 This reference design details a methodology to use the DP83849 evaluation board to implement a 10/100BASE-TX to 10/100BASE-FX media converter, which enables copper based legacy equipment to be easily connected to a fiber network. Copper based Ethernet (10/100BASE-TX) has been widely used in grid (...)
    document-generic Schematic document-generic User guide
    Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design
    PMP10630 The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 (...)
    document-generic Schematic document-generic User guide
    Reference Design for Telecom Applications (.9V @ .5A)
    PMP4742 PMP4742.1 comprises a negative input (-10.8V to -13.2V) to positive output (12V@1A average) inverting buck-boost converter with TPS40210; a hot swap circuit with TPS2420 quickly limits the output current to 2A peak.
    Design files
    FPGA Firmware Example of How To Interface Altera FPGAs to High-Speed LVDS-Interface Data Converters
    TIDA-00069 This reference design and the associated example Verilog code can be used as a starting point for interfacing Altera FPGAs to Texas Instruments' high-speed LVDS-interface analog-to-digital converters (ADC) and digital-to-analog converters (DAC). The firmware implementation is explained and the (...)
    document-generic Schematic document-generic User guide

    CAD/CAE symbols

    Package Pins Download
    VSON (DRC) 10 View options

    Ordering & quality

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    • Ongoing reliability monitoring

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