THS6204

활성

듀얼 포트 VDSL2 차동 라인 드라이버 증폭기

제품 상세 정보

Number of channels 2 Architecture DSL Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 28 BW at Acl (MHz) 160 Acl, min spec gain (V/V) 2 Vn at flatband (typ) (nV√Hz) 2.5 Vn at 1 kHz (typ) (nV√Hz) 8.5 Iq per channel (typ) (mA) 21 Vos (offset voltage at 25°C) (max) (mV) 50 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 65 Input bias current (max) (pA) 3000000 Offset drift (typ) (µV/°C) 110 GBW (typ) (MHz) 160 Iout (typ) (mA) 416 2nd harmonic (dBc) 100 3rd harmonic (dBc) 89 Frequency of harmonic distortion measurement (MHz) 1
Number of channels 2 Architecture DSL Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 28 BW at Acl (MHz) 160 Acl, min spec gain (V/V) 2 Vn at flatband (typ) (nV√Hz) 2.5 Vn at 1 kHz (typ) (nV√Hz) 8.5 Iq per channel (typ) (mA) 21 Vos (offset voltage at 25°C) (max) (mV) 50 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 65 Input bias current (max) (pA) 3000000 Offset drift (typ) (µV/°C) 110 GBW (typ) (MHz) 160 Iout (typ) (mA) 416 2nd harmonic (dBc) 100 3rd harmonic (dBc) 89 Frequency of harmonic distortion measurement (MHz) 1
HTSSOP (PWP) 24 49.92 mm² 7.8 x 6.4 VQFN (RHF) 24 20 mm² 5 x 4
  • Low Power Consumption:
    • 21mA/Port Full Bias Mode
    • 16.2mA/Port Mid Bias Mode
    • 11.2mA/Port Low Bias Mode
    • Low-Power Shutdown Mode
    • IADJ Pin for Variable Bias
  • Low Noise:
    • 2.5nV/Hz Voltage Noise
    • 17pA/Hz Inverting Current Noise
    • 1.2pA/Hz Noninverting Current Noise
  • Low MTPR Distortion:
    • 70dB with +20.5dBm G.993.2—Profile 8b
  • -89dBc HD3 (1MHz, 100 Differential)
  • High Output Current: > 424mA (25 Load)
  • Wide Output Swing: 43.2VPP (±12V, 100 Differential)
  • Wide Bandwidth: 150MHz (Gain = 10V/V)
  • Port-To-Port Separation of 90dB at 1MHz
  • PSRR of 50dB at 1MHz for Good Isolation
  • Wide Power-Supply Range: 10V to 28V
  • APPLICATIONS
    • Ideal For VDSL2 Systems
    • Backward-Compatible with ADSL/ADSL2+/ADSL2++ Systems

PowerPAD is a trademark of Texas Instruments, Incorporated.
All other trademarks are the property of their respective owners.

  • Low Power Consumption:
    • 21mA/Port Full Bias Mode
    • 16.2mA/Port Mid Bias Mode
    • 11.2mA/Port Low Bias Mode
    • Low-Power Shutdown Mode
    • IADJ Pin for Variable Bias
  • Low Noise:
    • 2.5nV/Hz Voltage Noise
    • 17pA/Hz Inverting Current Noise
    • 1.2pA/Hz Noninverting Current Noise
  • Low MTPR Distortion:
    • 70dB with +20.5dBm G.993.2—Profile 8b
  • -89dBc HD3 (1MHz, 100 Differential)
  • High Output Current: > 424mA (25 Load)
  • Wide Output Swing: 43.2VPP (±12V, 100 Differential)
  • Wide Bandwidth: 150MHz (Gain = 10V/V)
  • Port-To-Port Separation of 90dB at 1MHz
  • PSRR of 50dB at 1MHz for Good Isolation
  • Wide Power-Supply Range: 10V to 28V
  • APPLICATIONS
    • Ideal For VDSL2 Systems
    • Backward-Compatible with ADSL/ADSL2+/ADSL2++ Systems

PowerPAD is a trademark of Texas Instruments, Incorporated.
All other trademarks are the property of their respective owners.

The THS6204 is a dual-port, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in VDSL2 (very-high-bit-rate digital subscriber line 2) line driver systems that enable greater than +20.5dBm line power up to 8.5MHz with good linearity supporting the G.993.2 VDSL2 8b profile. It is also fast enough to support central-office transmission of +14.5dBm line power up to 18.1MHz—Profile 30a.

The unique architecture of the THS6204 allows quiescent current to be minimal while still achieving very high linearity. Differential distortion, under full bias conditions, is -89dBc at 1MHz and reduces to only -73dBc at 10MHz. Fixed multiple bias settings of the amplifiers allows for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an IADJ pin is available to further lower the bias currents.

The wide output swing of 43.2VPP (100 differentially) with ±12V power supplies, coupled with over 425mA current drive (25), allows for wide dynamic headroom, keeping distortion minimal.

The THS6204 is available in a QFN-24 or a TSSOP-24 PowerPAD™ package.

The THS6204 is a dual-port, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in VDSL2 (very-high-bit-rate digital subscriber line 2) line driver systems that enable greater than +20.5dBm line power up to 8.5MHz with good linearity supporting the G.993.2 VDSL2 8b profile. It is also fast enough to support central-office transmission of +14.5dBm line power up to 18.1MHz—Profile 30a.

The unique architecture of the THS6204 allows quiescent current to be minimal while still achieving very high linearity. Differential distortion, under full bias conditions, is -89dBc at 1MHz and reduces to only -73dBc at 10MHz. Fixed multiple bias settings of the amplifiers allows for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an IADJ pin is available to further lower the bias currents.

The wide output swing of 43.2VPP (100 differentially) with ±12V power supplies, coupled with over 425mA current drive (25), allows for wide dynamic headroom, keeping distortion minimal.

The THS6204 is available in a QFN-24 or a TSSOP-24 PowerPAD™ package.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
THS6222 활성 공통 모드 버퍼를 지원하는 차동 광대역 PLC 및 HPLC 라인 드라이버 Single port line driver for power line communication and DSL applications

기술 문서

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
모두 보기3
유형 직함 날짜
* Data sheet Dual-Port, Differential VDSL2 Line Driver Amplifiers datasheet (Rev. C) 2009/04/14
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017/03/28
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005/01/17

설계 및 개발

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TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

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사용 설명서: PDF
패키지 다운로드
HTSSOP (PWP) 24 옵션 보기
VQFN (RHF) 24 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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