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DS280BR820

現行

28-Gbps 低功耗 8 通道轉接驅動器

產品詳細資料

Type Redriver Number of channels 8 Speed (max) (Gbpp) 28.125 Input compatibility CML Protocols 100G-CR, 100GbE, CDFP, CFP2/CFP4, IEEE802.3bj, Infiniband EDR, OIF-CEi-25G-LR/MR/SR/VSR/CR, QSFP28 Operating temperature range (°C) -40 to 85
Type Redriver Number of channels 8 Speed (max) (Gbpp) 28.125 Input compatibility CML Protocols 100G-CR, 100GbE, CDFP, CFP2/CFP4, IEEE802.3bj, Infiniband EDR, OIF-CEi-25G-LR/MR/SR/VSR/CR, QSFP28 Operating temperature range (°C) -40 to 85
NFBGA (ZBL) 135 104 mm² 13 x 8
  • Octal-Channel Multi-Protocol Linear Equalizer Supporting up to 28 Gbps Interfaces
  • Low Power Consumption: 93 mW / Channel (Typical)
  • No Heat Sink Required
  • Linear Equalization for Seamless Support of Link Training, Auto-Negotiation, and FEC Pass-Through
  • Extends Channel Reach by 17 dB+ Beyond Normal ASIC-to-ASIC Capability
  • Ultra-Low Latency: 100 ps (Typical)
  • Low Additive Random Jitter
  • Small 8-mm x 13-mm BGA Package with Integrated RX AC Coupling Capacitors for Easy Flow-Through Routing
  • Unique Pinout Allows Routing High-Speed Signals Underneath the Package
  • Pin-Compatible Retimer Available
  • Single 2.5-V ±5% Power Supply
  • –40°C to +85°C Operating Temperature Range
  • Octal-Channel Multi-Protocol Linear Equalizer Supporting up to 28 Gbps Interfaces
  • Low Power Consumption: 93 mW / Channel (Typical)
  • No Heat Sink Required
  • Linear Equalization for Seamless Support of Link Training, Auto-Negotiation, and FEC Pass-Through
  • Extends Channel Reach by 17 dB+ Beyond Normal ASIC-to-ASIC Capability
  • Ultra-Low Latency: 100 ps (Typical)
  • Low Additive Random Jitter
  • Small 8-mm x 13-mm BGA Package with Integrated RX AC Coupling Capacitors for Easy Flow-Through Routing
  • Unique Pinout Allows Routing High-Speed Signals Underneath the Package
  • Pin-Compatible Retimer Available
  • Single 2.5-V ±5% Power Supply
  • –40°C to +85°C Operating Temperature Range

The DS280BR820 is an extremely low-power, high-performance eight-channel linear equalizer supporting multi-rate, multi-protocol interfaces up to 28 Gbps. It is used to extend the reach and improve the robustness of high-speed serial links for backplane, front-port, and chip-to-chip applications.

The linear nature of the DS280BR820’s equalization preserves the transmit signal characteristics, thereby allowing the host and link partner ASICs to freely negotiate transmit equalizer coefficients (100G-CR4/KR4). This transparency to the link training protocol facilitates system-level interoperability with minimal effect on the latency. Each channel operates independently, which allows the DS280BR820 to support individual lane Forward Error Correction (FEC) pass-through.

The DS280BR820’s small package dimensions, optimized high-speed signal escape, and the pin-compatible Retimer portfolio make the DS280BR820 ideal for high-density backplane applications. Simplified equalization control, low power consumption, and ultra-low additive jitter make it suitable for front-port interfaces such as 100G-SR4/LR4/CR4. The small 8-mm x 13-mm footprint easily fits behind numerous standard front-port connectors like QSFP, SFP, CFP2, CFP4, and CDFP without the need for a heat sink.

Integrated AC coupling capacitors (RX side) eliminate the need for external capacitors on the PCB. The DS280BR820 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and bill of materials (BOM) cost.

A pin-compatible Retimer device is available for longer reach applications.

The DS280BR820 can be configured either through the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM.

The DS280BR820 is an extremely low-power, high-performance eight-channel linear equalizer supporting multi-rate, multi-protocol interfaces up to 28 Gbps. It is used to extend the reach and improve the robustness of high-speed serial links for backplane, front-port, and chip-to-chip applications.

The linear nature of the DS280BR820’s equalization preserves the transmit signal characteristics, thereby allowing the host and link partner ASICs to freely negotiate transmit equalizer coefficients (100G-CR4/KR4). This transparency to the link training protocol facilitates system-level interoperability with minimal effect on the latency. Each channel operates independently, which allows the DS280BR820 to support individual lane Forward Error Correction (FEC) pass-through.

The DS280BR820’s small package dimensions, optimized high-speed signal escape, and the pin-compatible Retimer portfolio make the DS280BR820 ideal for high-density backplane applications. Simplified equalization control, low power consumption, and ultra-low additive jitter make it suitable for front-port interfaces such as 100G-SR4/LR4/CR4. The small 8-mm x 13-mm footprint easily fits behind numerous standard front-port connectors like QSFP, SFP, CFP2, CFP4, and CDFP without the need for a heat sink.

Integrated AC coupling capacitors (RX side) eliminate the need for external capacitors on the PCB. The DS280BR820 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and bill of materials (BOM) cost.

A pin-compatible Retimer device is available for longer reach applications.

The DS280BR820 can be configured either through the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM.

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類型 標題 日期
* Data sheet DS280BR820 Low Power 28 Gbps 8 Channel Linear Repeater datasheet (Rev. B) PDF | HTML 2019年 10月 3日
Application note Implementing Pin Compatible Ethernet Redrivers and Retimers PDF | HTML 2024年 10月 28日
Application note Optimal Implementation of 25G-28G Ethernet Retimers versus Redrivers (Rev. B) PDF | HTML 2023年 5月 1日
More literature Advanced Signal Conditioning Made Easy and Efficient 2017年 1月 12日
Application note Understanding EEPROM Programming for 25G and 28G Repeaters and Retimers 2016年 1月 13日

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DS280BR820EVM — DS280BR820 28 Gbps 8 通道線性中繼器評估模組

DS280BR820EVM 可讓您輕鬆評估 DS280BR820 28 Gbps 8 通道線性中繼器。若要使用此 EVM,請透過標準香蕉連接器提供電源 (2.5V 或 3.3V),並透過 Huber+Suhner 1x8 MXP 連接器提供高速通訊。不包括 Huber+Suhner 電纜組譯器。

透過板上 USB2ANY 連線和 EVM 軟體,使用者可以評估裝置功能,例如均衡設定、寬頻帶幅度增益設定、驅動程式設定、EEPROM 檔案產生,以及其他暫存器功能。

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參考設計

TIDA-00427 — 雙埠 100GbE/40GbE/10GbE QSFP28 訊號調節器參考設計

這項經過驗證的參考設計為適用於前連接埠 QSFP28 的訊號調整解決方案,支援兩個符合 100G-CR4/SR4/LR4、40G-CR4/SR4/LR4 及 10G SFF-8431 要求的 100GbE 連接埠。此設計適用於光學和被動/主動銅纜。該設計可實現 Switch ASIC 與前端連接埠 QSFP28 之間的延伸連接,這通常是機架頂端 (ToR) 交換器的最外側連接埠或 QSFP28 線卡的附加夾層實作所必需。此參考設計可讓使用者彈性地從 DS280BR810 中繼器升級至接腳相容的 DS250DF810 重定時器。
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NFBGA (ZBL) 135 Ultra Librarian

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