Interleaved Continuous Conduction Mode (CCM) Totem Pole (TTPL) Bridgeless Power Factor Correction (PFC) is an attractive power topology with use of high band-gap GaN devices, because of high efficiency and reduced size of the power supply. This design illustrates a method to control this power stage using C2000™ MCUs and the LMG3410 GaN FET module. Adaptive dead-time & phase shedding methods are implemented for improved efficiency. The Non- Linear Voltage Compensator is designed to reduce overshoot and undershoot during transients. A software phase locked loop(SPLL) based scheme is chosen to drive the totem pole bridge accurately. The hardware and software available with this design helps accelerate your time to market.
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Reference design overview and verified performance test data
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Detailed overview of design layout for component placement
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Design file that contains information on physical board layer of design PCB
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| Type | Title | Date | |
|---|---|---|---|
| * | Design guide | Bidirectional Interleaved CCM Totem Pole Bridgeless PFC RefDesign C2000™ MCU (Rev. E) | Apr. 05, 2021 |
| Application note | The Essential Guide for Developing With C2000 Real-Time Microcontrollers (Rev. C) | Apr. 27, 2021 | |
| White paper | 結合 TI GaN FETs 與 C2000™ 即時 MCU，實現功率密集與有效率的數位電源系統 | Mar. 18, 2021 | |
| White paper | TI GaN FET와 C2000™ 실시간 MCU를 결합하여 전력 밀도가 높고 효율적인 전원 시스템 달성 | Mar. 18, 2021 | |
| White paper | Achieve Power-Dense and Efficient Digital Power Systems by Combining TI GaN FETs | Jan. 05, 2021 | |
| White paper | Breakthrough technologies lead the solar power industry into the future | Jul. 27, 2018 | |
| Technical article | Digital power control advances GaN PFC design | Apr. 12, 2018 |
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