Each ADC module contains four
post-processing blocks (PPB). These blocks can be associated with any of the 16 RESULT registers using the
ADCPPBxCONFIG.CONFIG bit field. The post-processing blocks have the ability to:
- Remove an offset associated
with the ADCIN channel
- Subtract out a reference
value
- Compute
the delta between the current conversion result and the previous
conversion.
- Aggregate successive samples using sum, max, and min calculations
- Automatically calculate average of oversampled conversions without CPU
overhead, when sample count is a power of 2
- Transform the conversion result into an absolute value
- Flag a zero-crossing point,
with the option to trip a PWM and generate an interrupt
- Flag a high or low compare
limit, with the option to trip a PWM and generate an interrupt
- Digitally filter high or low compare results, to help prevent unwanted
threshold trips
- Record the delay between the
associated SOC trigger and when sampling actually begins
Figure 14-22 presents the structure of each PPB. Subsequent sections explain the use of each
submodule.