JAJSS15 November 2023 LMK3H0102
ADVANCE INFORMATION
R1 is shown in Table 12-23.
Return to the Summary Table.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15:8 | FOD0_NUM[23:16] | R/W | 0x55 | High byte of the FOD0 fractional divide value. |
7:0 | ADC_CLK_N_DIV | R/W | 0x99 | ADC clock frequency in MHz, derived directly from BAW. Default is ceil(2467 / 16) = 0x9B. TI does not recommend modifying the value of this field. |