SBASAW9 December   2024 ADC168M102R-SEP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Timing Diagrams
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog
        1. 6.3.1.1 Analog Inputs
        2. 6.3.1.2 Analog-to-Digital Converters (ADCs)
        3. 6.3.1.3 CONVST
        4. 6.3.1.4 CLOCK
        5. 6.3.1.5 RESET
        6. 6.3.1.6 REFIOx
      2. 6.3.2 Digital
        1. 6.3.2.1 Mode Selection Pins M0 and M1
        2. 6.3.2.2 Half-Clock Mode (Default Mode After Power-Up and Reset)
        3. 6.3.2.3 Full-Clock Mode (Allowing Conversion and Data Readout Within 1µs, Supported In Dual Output Modes)
        4. 6.3.2.4 2-Bit Counter
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power-Down Modes and Reset
        1. 6.4.1.1 Power-Down Mode
        2. 6.4.1.2 Sleep Mode
        3. 6.4.1.3 Auto-Sleep Mode
        4. 6.4.1.4 Reset
    5. 6.5 Programming
      1. 6.5.1 Read Data Input (RD)
      2. 6.5.2 Serial Data Outputs (SDOx)
        1. 6.5.2.1 Mode I
        2. 6.5.2.2 Mode II (Half-Clock Mode Only)
        3. 6.5.2.3 Special Read Mode II (Half-Clock Mode Only)
        4. 6.5.2.4 Mode III
        5. 6.5.2.5 Fully Differential Mode IV (Half-Clock Mode Only)
        6. 6.5.2.6 Special Mode IV (Half-Clock Mode Only)
      3. 6.5.3 Programming the Reference DAC
  8. 7 Register Map
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Grounding
        2. 8.4.1.2 Digital Interface
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Electrostatic Discharge Caution
    3. 9.3 Glossary
    4. 9.4 Trademarks
    5. 9.5 Receiving Notification of Documentation Updates
    6. 9.6 Support Resources
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.9 Typical Characteristics

at TA = +25°C, AVDD = 5V, DVDD = 3.3V, VREF = 2.5V (internal), and fDATA = 1MSPS (unless otherwise noted)

ADC168M102R-SEP Integral Nonlinearity vs Data Rate
 
Figure 5-3 Integral Nonlinearity vs Data Rate
ADC168M102R-SEP Integral Nonlinearity vs Code
 
Figure 5-5 Integral Nonlinearity vs Code
ADC168M102R-SEP Integral Nonlinearity vs Temperature
 
Figure 5-7 Integral Nonlinearity vs Temperature
ADC168M102R-SEP Offset Error and Offset Match vs Analog Supply Voltage
 
Figure 5-9 Offset Error and Offset Match vs Analog Supply Voltage
ADC168M102R-SEP Gain Error and Gain Match vs Analog Supply Voltage
 
Figure 5-11 Gain Error and Gain Match vs Analog Supply Voltage
ADC168M102R-SEP Common-Mode Rejection Ratio vs Analog Supply Voltage
 
Figure 5-13 Common-Mode Rejection Ratio vs Analog Supply Voltage
ADC168M102R-SEP Frequency Spectrum (4096 Point FFT; fIN = 10kHz)
 
Figure 5-15 Frequency Spectrum (4096 Point FFT; fIN = 10kHz)
ADC168M102R-SEP Signal-to-Noise Ratio and Signal-to-Noise + Distortion vs Input Signal Frequency
 
Figure 5-17 Signal-to-Noise Ratio and Signal-to-Noise + Distortion vs Input Signal Frequency
ADC168M102R-SEP Total Harmonic Distortion vs Input Signal Frequency
 
Figure 5-19 Total Harmonic Distortion vs Input Signal Frequency
ADC168M102R-SEP Spurious-Free Dynamic Range vs Input Signal Frequency
 
Figure 5-21 Spurious-Free Dynamic Range vs Input Signal Frequency
ADC168M102R-SEP Analog Supply Current vs Temperature
 
Figure 5-23 Analog Supply Current vs Temperature
ADC168M102R-SEP Analog Supply Current vs Data Rate
 
Figure 5-25 Analog Supply Current vs Data Rate
ADC168M102R-SEP Differential Nonlinearity vs Data Rate
 
Figure 5-4 Differential Nonlinearity vs Data Rate
ADC168M102R-SEP Differential Nonlinearity vs Code
 
Figure 5-6 Differential Nonlinearity vs Code
ADC168M102R-SEP Differential Nonlinearity vs Temperature
 
Figure 5-8 Differential Nonlinearity vs Temperature
ADC168M102R-SEP Offset Error and Offset Match vs Temperature
 
Figure 5-10 Offset Error and Offset Match vs Temperature
ADC168M102R-SEP Gain Error and Gain Match vs Temperature
 
Figure 5-12 Gain Error and Gain Match vs Temperature
ADC168M102R-SEP Common-Mode Rejection Ratio vs Temperature
 
Figure 5-14 Common-Mode Rejection Ratio vs Temperature
ADC168M102R-SEP Frequency Spectrum (4096 Point FFT; fIN = 10kHz, fSAMPLE = 0.5MSPS)
 
Figure 5-16 Frequency Spectrum (4096 Point FFT; fIN = 10kHz, fSAMPLE = 0.5MSPS)
ADC168M102R-SEP Signal-to-Noise Ratio and Signal-to-Noise + Distortion vs Temperature
 
Figure 5-18 Signal-to-Noise Ratio and Signal-to-Noise + Distortion vs Temperature
ADC168M102R-SEP Total Harmonic Distortion vs Temperature
 
Figure 5-20 Total Harmonic Distortion vs Temperature
ADC168M102R-SEP Spurious-Free Dynamic Range vs Temperature
 
Figure 5-22 Spurious-Free Dynamic Range vs Temperature
ADC168M102R-SEP Digital Supply Current vs Temperature
 
Figure 5-24 Digital Supply Current vs Temperature
ADC168M102R-SEP Analog Supply Current vs Data Rate (Auto-Sleep Mode)
 
Figure 5-26 Analog Supply Current vs Data Rate (Auto-Sleep Mode)