SLASFM1A June   2025  – December 2025 AFE10004-EP

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Timing Diagrams
    9. 5.9 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Digital-to-Analog Converter (DAC) Overview
        1. 6.3.1.1 DAC Resistor String
        2. 6.3.1.2 DAC Register Structure
        3. 6.3.1.3 DAC Buffer Amplifier
      2. 6.3.2 Output Switch Overview
      3. 6.3.3 Temperature Sensors
        1. 6.3.3.1 Temperature Data Format
          1. 6.3.3.1.1 Standard Binary-to-Decimal Temperature Data Calculation Example
          2. 6.3.3.1.2 Standard Decimal-to-Binary Temperature Data Calculation Example
        2. 6.3.3.2 Temperature Sensor Conversion Rate
        3. 6.3.3.3 Remote Temperature Sensor
          1. 6.3.3.3.1 Series Resistance Cancellation
          2. 6.3.3.3.2 Differential Input Capacitance
          3. 6.3.3.3.3 Filtering
          4. 6.3.3.3.4 Sensor Fault
          5. 6.3.3.3.5 η-Factor Correction
          6. 6.3.3.3.6 Remote Temperature Offset Register
        4. 6.3.3.4 Temperature Sensor Alarm Functions
      4. 6.3.4 Look-Up Table (LUT) and Arithmetic-Logic Unit (ALU)
        1. 6.3.4.1 LUT and ALU Organization
        2. 6.3.4.2 LUT Coefficient to Register Mapping
        3. 6.3.4.3 LUT Input and Output Ranges
      5. 6.3.5 Memory
        1. 6.3.5.1 Operating Memory Page Storage
        2. 6.3.5.2 EEPROM Storage
          1. 6.3.5.2.1 EEPROM Integrity Check
      6. 6.3.6 Device Sequence Control
        1. 6.3.6.1 Depletion-Mode Field-Effect Transistor (FET) Bias Requirements
        2. 6.3.6.2 Sequence Control
          1. 6.3.6.2.1 Start-Up Sequence
          2. 6.3.6.2.2 Power-Down Sequence
          3. 6.3.6.2.3 Alarm Event
    4. 6.4 Device Functional Modes
      1. 6.4.1 Autonomous Operating Mode
      2. 6.4.2 Manual Operating Mode
        1. 6.4.2.1 DAC Input Overwrite
        2. 6.4.2.2 Temperature Sensor Overwrite
        3. 6.4.2.3 ALU Bypass
      3. 6.4.3 Interrupt Mode
    5. 6.5 Programming
      1. 6.5.1 I2C Serial Interface
        1. 6.5.1.1 I2C Bus Overview
        2. 6.5.1.2 I2C Bus Definitions
        3. 6.5.1.3 I2C Target Address Selection
        4. 6.5.1.4 I2C Read and Write Operations
        5. 6.5.1.5 I2C Timeout Function
        6. 6.5.1.6 I2C General-Call Reset
      2. 6.5.2 Serial Peripheral Interface (SPI)
        1. 6.5.2.1 SPI Bus Overview
        2. 6.5.2.2 SPI Frame Error Check
  8. Register Maps
    1. 7.1 I2C Register Maps
    2. 7.2 SPI Register Maps
    3. 7.3 Registers
      1. 7.3.1 I2C Registers
        1. 7.3.1.1 I2C Page 1: Device Configuration Register Information
          1. 7.3.1.1.1  Local Temperature High Byte Register (offset = 00h) [reset = N/A]
          2. 7.3.1.1.2  Local Temperature Low Byte Register (offset = 01h) [reset = N/A]
          3. 7.3.1.1.3  Remote Temperature High Byte Register (offset = 02h) [reset = N/A]
          4. 7.3.1.1.4  Remote Temperature Low Byte Register (offset = 03h) [reset = N/A]
          5. 7.3.1.1.5  Temperature Status Register (offset = 04h) [reset = N/A]
          6. 7.3.1.1.6  AMC Status Register (offset = 05h) [reset = N/A]
          7. 7.3.1.1.7  Software Reset Register (offset = 07h) [reset = 00h]
          8. 7.3.1.1.8  Configuration 1 Register (offset = 08h) [reset = 01h]
          9. 7.3.1.1.9  Configuration 2 Register (offset = 09h) [reset = 08h]
          10. 7.3.1.1.10 LUT Configuration Register (offset = 0Ah) [reset = 03h]
          11. 7.3.1.1.11 DAC Overwrite Enable Register (offset = 0Bh) [reset = 00h]
          12. 7.3.1.1.12 Drive Enable Register (offset: 0Ch) [reset = 00h]
          13. 7.3.1.1.13 Drive Enable Select Register (offset: 0Dh) [reset = 00h]
          14. 7.3.1.1.14 Alarm Configuration Register (offset: 0Eh) [reset = 4Fh]
          15. 7.3.1.1.15 Interrupt Mode Register (offset = 0Fh) [reset = 00h]
          16. 7.3.1.1.16 Local Temperature High Limit Register (offset = 10h) [reset = 7Fh]
          17. 7.3.1.1.17 Local Temperature Low Limit Register (offset = 11h) [reset = 80h]
          18. 7.3.1.1.18 Remote Temperature High Limit High Byte Register (offset = 12h) [reset = 7Fh]
          19. 7.3.1.1.19 Remote Temperature High Limit Low Byte Register (offset = 13h) [reset = F0h]
          20. 7.3.1.1.20 Remote Temperature Low Limit High Byte Register (offset = 14h) [reset = 80h]
          21. 7.3.1.1.21 Remote Temperature Low Limit Low Byte Register (offset = 15h) [reset = 00h]
          22. 7.3.1.1.22 Remote Temperature Offset High Byte Register (offset = 16h) [reset = 00h]
          23. 7.3.1.1.23 Remote Temperature Offset Low Byte Register (offset = 17h) [reset = 00h]
          24. 7.3.1.1.24 THERM Hysteresis Register (offset = 1Ah) [reset = 0Ah]
          25. 7.3.1.1.25 Consecutive ALERT Register (offset = 1Bh) [reset = 01h]
          26. 7.3.1.1.26 η-Factor Correction Register (offset = 1Ch) [reset = 00h]
          27. 7.3.1.1.27 Digital Filter Control Register (offset = 1Dh) [reset = 00h]
          28. 7.3.1.1.28 Version ID Register (offset = 1Eh) [reset = 00h]
          29. 7.3.1.1.29 Device ID Register (offset = 1Fh) [reset = A3h]
          30. 7.3.1.1.30 Temperature Overwrite High Byte Register (offset = 22h) [reset = 00h]
          31. 7.3.1.1.31 Temperature Overwrite Low Byte Register (offset = 23h) [reset = 00h]
          32. 7.3.1.1.32 Reset Status Register (offset = 24h) [reset = N/A]
          33. 7.3.1.1.33 One-Shot Temperature Register (offset = 28h) [reset = 00h]
          34. 7.3.1.1.34 Software Alarm Register (offset = 2Ah) [reset = 00h]
        2. 7.3.1.2 I2C Page 2: DAC Configuration Register Information
          1. 7.3.1.2.1  DAC0 Input Data Register (offset = 00h - 01h) [reset = 00h]
          2. 7.3.1.2.2  DAC1 Input Data Register (offset = 02h - 03h) [reset = 00h]
          3. 7.3.1.2.3  DAC2 Input Data Register (offset = 04h - 05h) [reset = 00h]
          4. 7.3.1.2.4  DAC3 Input Data Register (offset = 06h - 07h) [reset = 00h]
          5. 7.3.1.2.5  DAC0 Overwrite Register (offset = 08h - 09h) [reset = 00h]
          6. 7.3.1.2.6  DAC1 Overwrite Register (offset = 0Ah - 0Bh) [reset = 00h]
          7. 7.3.1.2.7  DAC2 Overwrite Register (offset = 0Ch - 0Dh) [reset = 00h]
          8. 7.3.1.2.8  DAC3 Overwrite Register (offset = 0Eh - 0Fh) [reset = 00h]
          9. 7.3.1.2.9  CLAMP1 Overwrite Register (offset: 10h - 11h) [reset = 00h]
          10. 7.3.1.2.10 CLAMP2 Overwrite Register (offset: 12h - 13h) [reset = 00h]
          11. 7.3.1.2.11 CLAMP1 Input Data Register (offset: 18h - 19h) [reset = 00h]
          12. 7.3.1.2.12 CLAMP2 Input Data Register (offset: 1Ah - 1Bh) [reset = 00h]
          13. 7.3.1.2.13 DAC0 LUT Data Register (offset = 20h - 21h) [reset = 00h]
          14. 7.3.1.2.14 DAC1 LUT Data Register (offset = 22h - 23h) [reset = 00h]
          15. 7.3.1.2.15 DAC2 LUT Data Register (offset = 24h - 25h) [reset = 00h]
          16. 7.3.1.2.16 DAC3 LUT Data Register (offset = 26h - 27h) [reset = 00h]
          17. 7.3.1.2.17 Broadcast Register (offset = 30h - 31h) [reset = 00h]
        3. 7.3.1.3 I2C Page 4: LUT0 and LUT1 Configuration Register Information
          1. 7.3.1.3.1 DELTA HAMM Registers (offset = 00h - 63h) [reset = 00h (even addresses), FFh (odd addresses)]
          2. 7.3.1.3.2 DAC0 BASE HAMM Registers (offset = 64h - 67h) [reset = 00h]
          3. 7.3.1.3.3 DAC1 BASE HAMM Registers (offset = 68h - 6Bh) [reset = 00h]
        4. 7.3.1.4 I2C Page 5: LUT2 and LUT3 Configuration Register Information
          1. 7.3.1.4.1 DELTA HAMM Registers (offset = 00h - 63h) [reset = 00h (even addresses, FFh (odd addresses)]
          2. 7.3.1.4.2 DAC2 BASE HAMM Registers (offset = 64h - 67h) [reset = 00h]
          3. 7.3.1.4.3 DAC3 BASE HAMM Registers (offset = 68h - 6Bh) [reset = 00h]
        5. 7.3.1.5 I2C Page 15: Notepad Register Information
          1. 7.3.1.5.1 Notepad Registers (offset = 00h to 13h) [reset = 00h]
          2. 7.3.1.5.2 EEPROM Burn Register (offset = 7Ch) [reset = 00h]
      2. 7.3.2 SPI Registers
        1. 7.3.2.1 SPI Page 1: Device Configuration Register Information
          1. 7.3.2.1.1  Local Temperature Register (offset = 00h) [reset = N/A]
          2. 7.3.2.1.2  Remote Temperature Register (offset = 02h) [reset = N/A]
          3. 7.3.2.1.3  Status Register (offset = 04h) [reset = N/A]
          4. 7.3.2.1.4  Software Reset Register (offset = 06h) [reset = 0000h]
          5. 7.3.2.1.5  Configuration Register (offset = 08h) [reset = 0108h]
          6. 7.3.2.1.6  LUT/DAC Configuration Register (offset = 0Ah) [reset = 0300h]
          7. 7.3.2.1.7  Drive Enable Configuration Register (offset: 0Ch) [reset = 0000h]
          8. 7.3.2.1.8  Alarm Configuration Register (offset: 0Eh) [reset = 4F00h]
          9. 7.3.2.1.9  Local Temperature Limit Register (offset = 10h) [reset = 7F80h]
          10. 7.3.2.1.10 Remote Temperature High Limit Register (offset = 12h) [reset = 7FF0h]
          11. 7.3.2.1.11 Remote Temperature Low Limit Register (offset = 14h) [reset = 8000h]
          12. 7.3.2.1.12 Remote Temperature Offset Register (offset = 16h) [reset = 0000h]
          13. 7.3.2.1.13 Temperature Configuration 1 Register (offset = 1Ah) [reset = 0A01h]
          14. 7.3.2.1.14 Temperature Configuration 2 Register (offset = 1Ch) [reset = 0000h]
          15. 7.3.2.1.15 Device ID Register (offset = 1Eh) [reset = 00A3h]
          16. 7.3.2.1.16 Temperature Overwrite Register (offset = 22h) [reset = 0000h]
          17. 7.3.2.1.17 Reset Status Register (offset = 24h) [reset = N/A]
          18. 7.3.2.1.18 One-Shot Temperature Register (offset = 28h) [reset = 0000h]
          19. 7.3.2.1.19 Software Alarm Register (offset = 2Ah) [reset = 0000h]
        2. 7.3.2.2 SPI Page 2: DAC Configuration Register Information
          1. 7.3.2.2.1  DAC0 Input Data Register (offset = 00h) [reset = 0000h]
          2. 7.3.2.2.2  DAC1 Input Data Register (offset = 02h) [reset = 0000h]
          3. 7.3.2.2.3  DAC2 Input Data Register (offset = 04h) [reset = 0000h]
          4. 7.3.2.2.4  DAC3 Input Data Register (offset = 06h) [reset = 0000h]
          5. 7.3.2.2.5  DAC0 Overwrite Register (offset = 08h) [reset = 0000h]
          6. 7.3.2.2.6  DAC1 Overwrite Register (offset = 0Ah) [reset = 0000h]
          7. 7.3.2.2.7  DAC2 Overwrite Register (offset = 0Ch) [reset = 0000h]
          8. 7.3.2.2.8  DAC3 Overwrite Register (offset = 0Eh) [reset = 0000h]
          9. 7.3.2.2.9  CLAMP1 Overwrite Register (offset: 10h) [reset = 0000h]
          10. 7.3.2.2.10 CLAMP2 Overwrite Register (offset: 12h) [reset = 0000h]
          11. 7.3.2.2.11 CLAMP1 Input Data Register (offset: 18h) [reset = 0000h]
          12. 7.3.2.2.12 CLAMP2 Input Data Register (offset: 1Ah) [reset = 0000h]
          13. 7.3.2.2.13 DAC0 LUT Data Register (offset = 20h) [reset = 0000h]
          14. 7.3.2.2.14 DAC1 LUT Data Register (offset = 22h) [reset = 0000h]
          15. 7.3.2.2.15 DAC2 LUT Data Register (offset = 24h) [reset = 0000h]
          16. 7.3.2.2.16 DAC3 LUT Data Register (offset = 26h) [reset = 0000h]
          17. 7.3.2.2.17 Broadcast Register (offset = 30h) [reset = 0000h]
        3. 7.3.2.3 SPI Page 4: LUT0 and LUT1 Configuration Register Information
          1. 7.3.2.3.1 DELTA Registers (offset = 00h - 62h) [reset = 00FFh]
          2. 7.3.2.3.2 DAC0 BASE Registers (offset = 64h - 66h) [reset = 0000h]
          3. 7.3.2.3.3 DAC1 BASE Registers (offset = 68h - 6Ah) [reset = 0000h]
        4. 7.3.2.4 SPI Page 5: LUT2 and LUT3 Configuration Register Information
          1. 7.3.2.4.1 DELTA Registers (offset = 00h - 62h) [reset = 00FFh]
          2. 7.3.2.4.2 DAC2 BASE Registers (offset = 64h - 66h) [reset = 0000h]
          3. 7.3.2.4.3 DAC3 BASE Registers (offset = 68h - 6Ah) [reset = 0000h]
        5. 7.3.2.5 SPI Page 15: Notepad Register Information
          1. 7.3.2.5.1 Notepad Registers (offset = 00h to 12h) [reset = 0000h]
          2. 7.3.2.5.2 EEPROM Burn Register (offset = 7Ch) [reset = 0000h]
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Switching Timing
    2. 8.2 Typical Applications
      1. 8.2.1 Temperature-Compensated Bias Generator for an LDMOS Power Amplifier (PA)
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Supply Voltage Selection
          2. 8.2.1.2.2 DAC Output Voltage Range
          3. 8.2.1.2.3 Temperature-Sensing Applications
          4. 8.2.1.2.4 PAVDD Isolation From the Power Amplifier
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Temperature-Compensated Bias Generator for a Gallium Nitride (GaN) Power Amplifier (PA)
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Supply Voltage Selection
          2. 8.2.2.2.2 DAC Output Voltage Range
        3. 8.2.2.3 Application Curves
    3. 8.3 Initialization Setup
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
        1. 8.5.2.1 Positive Output Range Layout Example
        2. 8.5.2.2 Negative Output Range Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

SPI Register Maps

Table 7-6 SPI Page 1: Device Configuration Register Map
ADDR (HEX) TYPE FACT (HEX) BIT DESCRIPTION (Shaded Bits are not Stored in EEPROM) REGISTER DESCRIPTION
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
00 R N/A LT[11:0] 0 0 0 0 Local temperature
02 R N/A RT[11:0] 0 0 0 0 Remote temperature
04 R N/A BUSY LHIGH LLOW RHIGH RLOW OPEN X X TMP
STAT
PAON EECRC SPICRC EERDY DED SEC GAN Status
06 W 0000 X X X X X X X X SOFTRST[7:0] Software reset
08 R/W 0108 X TMPSD ALERT/ THERM VSS
RANGE
DAC
ILMT
TMP
RANGE
TMRCNT[1:0] CRCEN SDOEN HAMM
OFF
X CR[3:0] Configuration
0A R/W 0300 X X LUT
STAT
LUT
DIS
LUT
SEL2
LUT
SEL1
REN LEN BYP3 BYP2 BYP1 BYP0 DAC3OW DAC2OW DAC1OW DAC0OW LUT/DAC configuration
0C R/W 0000 X X DRV
EN3
DRV
EN2
X X DRV
EN1
DRV
EN0
X X DRV
SEL3
DRV
SEL2
X X DRV
SEL1
DRV
SEL0
Drive enable configuration
0E R/W 4F00 ALMIN
EN
PAON
DIS
X X DAC3
OFF
OUT2
OFF
OUT1
OFF
DAC0
OFF
RESETCMD[1:0] X AMC
INT
DRVEN
RLS
PAON
RLS
DACHC
RLS
DAC
RLS
Alarm configuration
10 R/W 7F80 LTHL[11:4] LTLL[11:4] Local temperature limit
12 R/W 7FF0 RTHL[11:4] RTHL[3:0] X X X X Remote temperature high limit
14 R/W 8000 RTLL[11:4] RTLL[3:0] X X X X Remote temperature low limit
16 R/W 0000 RTOS[11:0] X X X X Remote temperature offset
1A R/W 0A01 HYS[11:4] X X X X CONAL[2:0] 1 Temperature configuration 1
1C R/W 0000 NC[7:0] X X X X X X DF[1:0] Temperature configuration 2
1E R 00A3 VERSION[7:0] ID[7:0] Device ID
22 R/W 0000 TMPOW[11:0] 0 0 0 TMPOW Temperature overwrite
24 R N/A X X X X RESETSTA[3:0] 0 0 0 0 0 0 0 0 Reset status
28 W 0000 TMPONE[15:0] One-shot temperature
2A R/W 0000 X X X X X X X SW
ALM
X X X X X X X X Software alarm
Table 7-7 SPI Page 2: DAC Configuration Register Map
ADDR (HEX) TYPE FACT (HEX) BIT DESCRIPTION (Shaded Bits are not Stored in EEPROM) REGISTER DESCRIPTION
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
00 R 0000 0 0 0 DAC0[12:0] DAC0
02 R 0000 0 0 0 DAC1[12:0] DAC1
04 R 0000 0 0 0 DAC2[12:0] DAC2
06 R 0000 0 0 0 DAC3[12:0] DAC3
08 R/W 0000 X X X DAC0OW[12:0] DAC0 overwrite
0A R/W 0000 X X X DAC1OW[12:0] DAC1 overwrite
0C R/W 0000 X X X DAC2OW[12:0] DAC2 overwrite
0E R/W 0000 X X X DAC3OW[12:0] DAC3 overwrite
10 R/W 0000 X X X CLM1OW[12:0] CLAMP1 overwrite
12 R/W 0000 X X X CLM2OW[12:0] CLAMP2 overwrite
18 R 0000 0 0 0 CLM1[12:0] CLAMP1
1A R 0000 0 0 0 CLM2[12:0] CLAMP2
20 R 0000 0 0 0 DAC0LUT[12:0] DAC0 LUT
22 R 0000 0 0 0 DAC1LUT[12:0] DAC1 LUT
24 R 0000 0 0 0 DAC2LUT[12:0] DAC2 LUT
26 R 0000 0 0 0 DAC3LUT[12:0] DAC3 LUT
30 R/W 0000 X X X BRDCST[12:0] Broadcast
Table 7-8 SPI Page 4: LUT0 and LUT1 Configuration Register Map
ADDR (HEX) TYPE FACT (HEX) BIT DESCRIPTION (Shaded Bits are not Stored in EEPROM) REGISTER DESCRIPTION
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
00 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn48: –48°C
02 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn44: –44°C
04 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn40: –40°C
06 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn36: –36°C
08 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn32: –32°C
0A R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn28: –28°C
0C R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn24: –24°C
0E R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn20: –20°C
10 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn16: –16°C
12 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn12: –12°C
14 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn8: –8°C
16 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAn4: –4°C
18 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp0: 0°C
1A R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp4: 4°C
1C R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp8: 8°C
1E R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp12: 12°C
20 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp16: 16°C
22 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp20: 20°C
24 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp28: 28°C
26 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp32: 32°C
28 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp36: 36°C
2A R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp40: 40°C
2C R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp44: 44°C
2E R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp48: 48°C
30 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp52: 52°C
32 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp56: 56°C
34 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp60: 60°C
36 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp64: 64°C
38 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp68: 68°C
3A R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp72: 72°C
3C R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp76: 76°C
3E R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp80: 80°C
40 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp84: 84°C
42 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp88: 88°C
44 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp92: 92°C
46 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp96: 96°C
48 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp100: 100°C
4A R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp104: 104°C
4C R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp108: 108°C
4E R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp112: 112°C
50 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp116: 116°C
52 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp120: 120°C
54 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp124: 124°C
56 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp128: 128°C
58 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp132: 132°C
5A R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp136: 136°C
5C R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp140: 140°C
5E R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp144: 144°C
60 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp148: 148°C
62 R/W 00FF P HAMM[3:0] X X X DAC1[3:0] DAC0[3:0] DELTAp152: 152°C
64 R/W 0000 P HAMM[3:0] X X X X X DAC0
POL
DAC0BASE[12:8] DAC0 BASE (high)
66 R/W 0000 P HAMM[3:0] X X X DAC0BASE[7:0] DAC0 BASE (low)
68 R/W 0000 P HAMM[3:0] X X X X X DAC1
POL
DAC1BASE[12:8] DAC1 BASE (high)
6A R/W 0000 P HAMM[3:0] X X X DAC1BASE[7:0] DAC1 BASE (low)
Table 7-9 SPI Page 5: LUT2 and LUT3 Configuration Register Map
ADDR (HEX) TYPE FACT (HEX) BIT DESCRIPTION (Shaded Bits are not Stored in EEPROM) REGISTER DESCRIPTION
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
00 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn48: –48°C
02 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn44: –44°C
04 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn40: –40°C
06 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn36: –36°C
08 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn32: –32°C
0A R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn28: –28°C
0C R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn24: –24°C
0E R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn20: –20°C
10 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn16: –16°C
12 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn12: –12°C
14 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn8: –8°C
16 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAn4: –4°C
18 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp0: 0°C
1A R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp4: 4°C
1C R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp8: 8°C
1E R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp12: 12°C
20 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp16: 16°C
22 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp20: 20°C
24 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp28: 28°C
26 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp32: 32°C
28 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp36: 36°C
2A R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp40: 40°C
2C R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp44: 44°C
2E R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp48: 48°C
30 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp52: 52°C
32 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp56: 56°C
34 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp60: 60°C
36 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp64: 64°C
38 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp68: 68°C
3A R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp72: 72°C
3C R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp76: 76°C
3E R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp80: 80°C
40 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp84: 84°C
42 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp88: 88°C
44 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp92: 92°C
46 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp96: 96°C
48 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp100: 100°C
4A R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp104: 104°C
4C R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp108: 108°C
4E R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp112: 112°C
50 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp116: 116°C
52 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp120: 120°C
54 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp124: 124°C
56 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp128: 128°C
58 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp132: 132°C
5A R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp136: 136°C
5C R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp140: 140°C
5E R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp144: 144°C
60 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp148: 148°C
62 R/W 00FF P HAMM[3:0] X X X DAC3[3:0] DAC2[3:0] DELTAp152: 152°C
64 R/W 0000 P HAMM[3:0] X X X X X DAC2
POL
DAC2BASE[12:8] DAC2 BASE (high)
66 R/W 0000 P HAMM[3:0] X X X DAC2BASE[7:0] DAC2 BASE (low)
68 R/W 0000 P HAMM[3:0] X X X X X DAC3
POL
DAC3BASE[12:8] DAC3 BASE (high)
6A R/W 0000 P HAMM[3:0] X X X DAC3BASE[7:0] DAC3 BASE (low)
Table 7-10 SPI Page 15: Notepad Register Map
ADDR (HEX) TYPE FACT (HEX) BIT DESCRIPTION (Shaded Bits are not Stored in EEPROM) REGISTER DESCRIPTION
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
00 R/W 0000 PAD0[7:0] PAD1[7:0] Notepad 0-1
02 R/W 0000 PAD2[7:0] PAD3[7:0] Notepad 2-3
04 R/W 0000 PAD4[7:0] PAD5[7:0] Notepad 4-5
06 R/W 0000 PAD6[7:0] PAD7[7:0] Notepad 6-7
08 R/W 0000 PAD8[7:0] PAD9[7:0] Notepad 8-9
0A R/W 0000 PAD10[7:0] PAD11[7:0] Notepad 10-11
0C R/W 0000 PAD12[7:0] PAD13[7:0] Notepad 12-13
0E R/W 0000 PAD14[7:0] PAD15[7:0] Notepad 14-15
10 R/W 0000 PAD16[7:0] PAD17[7:0] Notepad 16-17
12 R/W 0000 PAD18[7:0] PAD19[7:0] Notepad 18-19
7C W 0000 EEBURN[7:0] X X X X X X X X EEPROM burn