• At least one uninterrupted ground plane for four or more layers.
• High-speed outer-layer microstrips referenced to the nearest solid ground plane.
• High-speed inner-layer striplines sandwiched between reference planes when emissions must be minimized.
• Thin dielectric between signal and reference plane for tighter field coupling and lower loop inductance.
• Power planes adjacent to ground planes so plane capacitance and decoupling work together.
• No routing over ground-plane slots, large voids, anti-pad fields, or split boundaries.

Plane splitting is often overused. Separating analog and digital copper can make sense for low-level measurement regions, but cutting the reference under a fast signal is typically worse than sharing a continuous plane with disciplined placement. The safer pattern is often a single solid ground plane, physical partitioning of noisy and quiet circuits, and controlled single-point or boundary treatment only where current paths are understood.

Another stack up and layer setup method to remove “fringing fields” is often referred to as the 20-H Rule. The 20-H rule proposes recessing a power plane from a ground-plane edge by roughly twenty times the dielectric separation H to reduce edge fringing. The rule can be a useful geometric heuristic when plane-pair edge radiation is a known contributor. The 20-H rule is not a substitute for a close plane pair, local decoupling, continuous references, or control of cable common-mode current. Modern boards must validate the benefit against stack-up, power distribution, and manufacturing constraints rather than apply the rule automatically.