STDA033 October   2026 MSPM0G3105-Q1 , MSPM0G3106-Q1 , MSPM0G3107-Q1 , MSPM0G3505-Q1 , MSPM0G3506-Q1 , MSPM0G3507-Q1 , MSPM0L1227-Q1 , MSPM0L1228-Q1 , MSPM0L2227-Q1 , MSPM0L2228-Q1 , MSPM33C321A

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1.     How Does an Electromagnetic Field Start in a Circuit?
    2.     Near-Field and Far-Field Electromagnetic Fields
  5. 2Common Sources of EMI in Electronic Designs
    1. 2.1 Resistors
      1. 2.1.1 Equivalent Series Inductance (ESL)
      2. 2.1.2 Shunt Capacitance
      3. 2.1.3 Parasitic Capacitance to Ground
    2. 2.2 Capacitors
      1. 2.2.1 Equivalent Series Resistance (ESR)
      2. 2.2.2 Equivalent Series Inductance (ESL)
      3. 2.2.3 Leakage Resistance
      4. 2.2.4 Dielectric Absorption (Soakage)
    3. 2.3 Inductors
      1. 2.3.1 Direct Current Resistance (DCR)
      2. 2.3.2 Parasitic Capacitance
      3. 2.3.3 Core Losses (Magnetic Parasitics)
    4. 2.4 Summary of Discrete Component EMI Considerations
    5. 2.5 Design Deficiencies
    6. 2.6 Sources Specific to MCUs
      1. 2.6.1 Clock Circuits and Oscillators
    7. 2.7 Other Common Sources
      1. 2.7.1 High-Speed Digital Buses
      2. 2.7.2 I/O Output Transitions
      3. 2.7.3 Floating Components
      4. 2.7.4 External Environmental Sources
  6. 3Mitigation Techniques to Minimize EMI and Optimize Board Performance
    1. 3.1 Power Supply Capacitor Selection and Placement
    2. 3.2 Capacitor Placement
    3. 3.3 Layer Stack-Up Optimization
      1. 3.3.1 Good Stack-Up Traits
      2. 3.3.2 Stitching and Shielding Optimization Techniques
    4. 3.4 Trace Routing
    5. 3.5 Passive Pi Filtering
    6. 3.6 Shielding, Grounding, and Cable Boundaries
    7. 3.7 Transient and ESD Current Paths
  7. 4EMC Verification and Troubleshooting
    1. 4.1 Emissions and Immunity as Port Problems
    2. 4.2 Pre-Compliance Measurement Toolkit
    3. 4.3 A Frequency-to-Structure Debug Method
    4. 4.4 Interpreting Common Spectral Signatures
    5. 4.5 Integrated Design Review Checklist
  8. 5Conclusion

3.7 Transient and ESD Current Paths

Protection is most effective when the transient is intercepted at the boundary and given a short path to the intended reference or chassis. A protection device placed far from the connector leaves a long unprotected trace that can radiate and couple into neighboring circuits. The clamping voltage at the IC equals the protector's dynamic clamp plus voltage across path inductance and resistance.

The voltage that reaches the IC includes the dynamic clamp of the protector, plus additional voltage created by path inductance and resistance. A long protection route can therefore defeat an otherwise suitable suppressor.

  • Place transient suppression close to the entry point.
  • Keep the discharge path short, wide, and separate from sensitive return paths.
  • Coordinate protection capacitance and leakage with signal bandwidth and precision requirements.
  • Design firmware to detect, log, and recover from non-destructive upset where appropriate.