DRV8300U

ACTIVO

Controlador de compuerta trifásico sencillo de 100 V máx. con diodos de arranque y protección UVLO m

Detalles del producto

Rating Catalog Architecture Gate driver Control interface 3xPWM, 6xPWM Gate drive (A) 0.75 Vs (min) (V) 5 Vs ABS (max) (V) 100 Features Bootstrap Diode Operating temperature range (°C) -40 to 125
Rating Catalog Architecture Gate driver Control interface 3xPWM, 6xPWM Gate drive (A) 0.75 Vs (min) (V) 5 Vs ABS (max) (V) 100 Features Bootstrap Diode Operating temperature range (°C) -40 to 125
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 VQFN (RGE) 24 16 mm² 4 x 4
  • 100V Three Phase Half-Bridge Gate driver
    • Drives N-Channel MOSFETs (NMOS)
    • Gate Driver Supply (GVDD): 5-20V
    • MOSFET supply (SHx) support up to 100V
  • Integrated Bootstrap Diodes (DRV8300UD devices)
  • Supports Inverting and Non-Inverting INLx inputs
  • Bootstrap gate drive architecture
    • 750mA source current
    • 1.5A sink current
  • Supports up to 15S battery powered applications
  • Higher BSTUV (8V typ) and GVDDUV (7.6V typ) threshold to support standard MOSFETs
  • Low leakage current on SHx pins (<55µA)
  • Absolute maximum BSTx voltage up to 125V
  • Supports negative transients up to -22V on SHx
  • Built-in cross conduction prevention
  • Adjustable deadtime through DT pin for QFN package variants
  • Fixed deadtime insertion of 200nS for TSSOP package variants
  • Supports 3.3V and 5V logic inputs with 20V Abs max
  • 4nS typical propagation delay matching
  • Compact QFN and TSSOP packages
  • Efficient system design with Power Blocks
  • Integrated protection features
    • BST undervoltage lockout (BSTUV)
    • GVDD undervoltage (GVDDUV)
  • 100V Three Phase Half-Bridge Gate driver
    • Drives N-Channel MOSFETs (NMOS)
    • Gate Driver Supply (GVDD): 5-20V
    • MOSFET supply (SHx) support up to 100V
  • Integrated Bootstrap Diodes (DRV8300UD devices)
  • Supports Inverting and Non-Inverting INLx inputs
  • Bootstrap gate drive architecture
    • 750mA source current
    • 1.5A sink current
  • Supports up to 15S battery powered applications
  • Higher BSTUV (8V typ) and GVDDUV (7.6V typ) threshold to support standard MOSFETs
  • Low leakage current on SHx pins (<55µA)
  • Absolute maximum BSTx voltage up to 125V
  • Supports negative transients up to -22V on SHx
  • Built-in cross conduction prevention
  • Adjustable deadtime through DT pin for QFN package variants
  • Fixed deadtime insertion of 200nS for TSSOP package variants
  • Supports 3.3V and 5V logic inputs with 20V Abs max
  • 4nS typical propagation delay matching
  • Compact QFN and TSSOP packages
  • Efficient system design with Power Blocks
  • Integrated protection features
    • BST undervoltage lockout (BSTUV)
    • GVDD undervoltage (GVDDUV)

DRV8300U is 100V three half-bridge gate drivers, capable of driving high-side and low-side N-channel power MOSFETs. The DRV8300UD generates the correct gate drive voltages using an integrated bootstrap diode and external capacitor for the high-side MOSFETs. GVDD is used to generate gate drive voltage for the low-side MOSFETs. The Gate Drive architecture supports peak up to 750mA source and 1.5A sink currents.

The phase pins SHx is able to tolerate the significant negative voltage transients; while high side gate driver supply BSTx and GHx is able to support to higher positive voltage transients (125V) abs max voltage which improves robustness of the system. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency. Undervoltage protection is provided for both low and high side through GVDD and BST undervoltage lockout.

DRV8300U is 100V three half-bridge gate drivers, capable of driving high-side and low-side N-channel power MOSFETs. The DRV8300UD generates the correct gate drive voltages using an integrated bootstrap diode and external capacitor for the high-side MOSFETs. GVDD is used to generate gate drive voltage for the low-side MOSFETs. The Gate Drive architecture supports peak up to 750mA source and 1.5A sink currents.

The phase pins SHx is able to tolerate the significant negative voltage transients; while high side gate driver supply BSTx and GHx is able to support to higher positive voltage transients (125V) abs max voltage which improves robustness of the system. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency. Undervoltage protection is provided for both low and high side through GVDD and BST undervoltage lockout.

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Documentación técnica

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* Data sheet DRV8300U: 100V Three-Phase BLDC Gate Driver datasheet (Rev. B) PDF | HTML 24 jun 2025

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

DRV8300DIPW-EVM — Módulo de evaluación DRV8300DIPW para BLDC trifásico

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Guía del usuario: PDF | HTML
Placa de evaluación

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Guía del usuario: PDF | HTML
Primeros pasos

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Productos y hardware compatibles

Productos y hardware compatibles

Empiece Opciones de descarga
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
TSSOP (PW) 20 Ultra Librarian
VQFN (RGE) 24 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL)/reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

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