Featured evaluation modules
Ultra-low-jitter programmable oscillator evaluation module.
Ultra-low-jitter clock generator EVM with 2 PLLs, 8 differential outputs, and 2 inputs.
Ultra low jitter synthesizer and jitter cleaner.
6.4-GHz low power wideband RF synthesizer with phase synchronization and JESD204B support.
Ultra-low noise 14 GHz wideband RF PLL with ramp/chirp generation.
Ultra-low noise and low power JESD204B compliant dual loop jitter cleaner.
Featured TI designs
EN55011 ethernet brick.
AM3359 industrial communications engine.
Isolated current shunt and voltage measurement reference design for motor drives use.
SDI video aggregation reference design.
DisplayPort video 4:1 aggregation reference design.
Equalization optimization of a JESD204B serial link reference design.
Complete, optimized clock tree solutions in minutes.
Loop filter and device configuration plus simulation.
Used for programming EVMs, including PLL+VCO, synthesizers, and clocking devices.
Allows detailed design and simulation of the Texas Instruments LMX series of PLLs and synthesizers.