SLVSE46A November 2017 – January 2018 TPS65680
The TPS65680 contains one-time-programmable (OTP), non-volatile memory for storing configuration settings and pattern sequence. The device supports a minimum of three and a maximum of nine programming cycles, depending on the size of the pattern sequence. The programming voltage is generated by the internal OTP LDO which is supplied by VGH, therefore VGH must be applied to the IC prior to initiating the programming sequence.
Programming is initiated by setting the WRITE bit of the register to 1. The OTP LDO is automatically enabled before the content of the register space is copied into non-volatile memory. After programing is complete, the OTP LDO is disabled, the WRITE bit is reset to 0, and the device returns to STANDBY state. If the OTP LDO fails to reach the desired programming voltage window within 100 ms of the WRITE bit being set, the device times out and returns to the STANDBY state without modifying the NVM. This case may occur if the OTP_LDO voltage is forced externally, VGH is not supplied, or VGH is below 10V.
To program the NVM:
Prior to initiating the programming sequence, a check is performed to ensure enough memory is available to hold the new settings, and the device has been programmed less than 9 times. In addition, the OTP_LDO output voltage is monitored to make sure it is within a defined range. If not enough memory is available, no programing cycle is left, or the programming voltage is incorrect, the device returns to STANDBY mode without changing the memory content, and the OTP_FAULT bit is set in the register.