SLUUCP8A June 2024 – April 2025 BQ41Z50
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | AFE | OCD 2 Delay 2 | H1 | 0x0 | 0x07 | 0x07 | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | SC_OCD2_FAULT_DLY2 | ||||||
| RSVD (Bits 7 - 3): Reserved. Do not use. | ||
| SC_OCD2_FAULT_DLY2 (Bits 2-0): Upper 3 bit of the OCD2_FAULT delay bits 10:8. DLY2 has to be written first and then DLY1. | ||