SLUUCP8A June 2024 – April 2025 BQ41Z50
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | AFE | OCD Wake Delay 2 | H1 | 0x0 | 0x01 | 0x01 | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | SC_CD_WAKE_DLY2 | ||||||
| RSVD (Bits 7-1): Reserved. Do not use. | ||
| SC_CD_WAKE_DLY2 (Bit 0): Upper 1 bit of CD_WAKE delay bit 8. DLY2 has to be written first and then DLY1. | ||