| RSVD (Bit 7-5): Reserved. Do not
use. |
| | |
| RL4_PIN_8_EN (Bit 4): Initial direction
of RL4_PIN_8 |
| 1 = | Enabled for output (default) |
| 0 = | Disabled for output. The pin read as inpubt using pulsed
pull up |
| | |
| RL3_PIN_7 (Bit 3): Initial direction of
RL3_PIN_7 |
| 1 = | Enabled for output (default) |
| 0 = | Disabled for output. The pin read as inpubt using pulsed
pull up |
| | |
| RL2_PIN_4 (Bit
2): Initial direction of RL2_PIN_4 |
|
1 = |
Enabled for output
(default) |
|
0 = |
Disabled for output. The pin
read as inpubt using pulsed pull up |
|
|
|
| RL1_PIN_3 (Bit
1): Initial direction of RL1_PIN_3 |
|
1 = |
Enabled for output
(default) |
|
0 = |
Disabled for output. The pin
read as inpubt using pulsed pull up |
|
|
|
| RL0_PIN_32 (Bit 0): Initial direction
of RL0_PIN_32 |
| 1 = | Enabled for output (default) |
| 0 = | Disabled for output. The pin read as inpubt using pulsed
pull up |