SLVSJC6 December   2025 TPS544B27W

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Frequency and Mode
      2. 6.3.2 Setting the Output Voltage
      3. 6.3.3 DC Load Line
      4. 6.3.4 Fault Management
      5. 6.3.5 Current Sense and Positive Overcurrent Protection
      6. 6.3.6 Negative Overcurrent Limit
      7. 6.3.7 Zero-Crossing Detection
      8. 6.3.8 Overtemperature Protection
      9. 6.3.9 PMBus® Interface
        1. 6.3.9.1 Setting the PMBus® Address
        2. 6.3.9.2 SMBus Alert Response Address
    4. 6.4 Device Functional Modes
      1. 6.4.1 Forced Continuous-Conduction Mode
      2. 6.4.2 DCM Light Load Operation
    5. 6.5 Programming
      1. 6.5.1 PMBus® Command NVM Defaults
  8. Register Maps
    1. 7.1 PMBus® Transaction Types
    2. 7.2 Conventions for Documenting Block Commands
    3. 7.3 PMBus Commands
      1. 7.3.1  OPERATION (Address = 01h)
      2. 7.3.2  ON_OFF_CONFIG (Address = 02h)
      3. 7.3.3  CLEAR_FAULTS (Address = 03h)
      4.      42
      5. 7.3.4  PASSKEY (Address = 0Eh)
      6. 7.3.5  WRITE_PROTECT (Address = 10h)
      7. 7.3.6  STORE_USER_ALL (Address = 15h)
      8.      46
      9. 7.3.7  RESTORE_USER_ALL (Address = 16h)
      10.      48
      11. 7.3.8  CAPABILITY (Address = 19h)
      12. 7.3.9  SMBALERT_MASK (Address = 1Bh)
      13.      51
      14. 7.3.10 SMBALERT_MASK Registers
        1. 7.3.10.1  ALERT_MASK_BYTE (Address = 78h) [Reset = C8h]
        2. 7.3.10.2  ALERT_MASK_WORD (Address = 79h) [Reset = 0Dh]
        3. 7.3.10.3  ALERT_MASK_VOUT (Address = 7Ah) [Reset = XXh]
        4. 7.3.10.4  ALERT_MASK_IOUT (Address = 7Bh) [Reset = XFh]
        5. 7.3.10.5  ALERT_MASK_INPUT (Address = 7Ch) [Reset = XXh]
        6. 7.3.10.6  ALERT_MASK_TEMPERATURE (Address = 7Dh) [Reset = XFh]
        7. 7.3.10.7  ALERT_MASK_CML (Address = 7Eh) [Reset = XXh]
        8. 7.3.10.8  ALERT_MASK_OTHER (Address = 7Fh) [Reset = XFh]
        9. 7.3.10.9  ALERT_MASK_MFR_SPECIFIC (Address = 80h) [Reset = XXh]
        10. 7.3.10.10 ALERT_MASK_PULSE_CATCHER (Address = CEh) [Reset = FXh]
      15. 7.3.11 VOUT_MODE (Address = 20h)
      16. 7.3.12 VOUT_COMMAND (Address = 21h)
      17. 7.3.13 VOUT_TRIM (Address = 22h)
      18. 7.3.14 VOUT_MAX (Address = 24h)
      19.      67
      20. 7.3.15 VOUT_MARGIN_HIGH (Address = 25h)
      21.      69
      22. 7.3.16 VOUT_MARGIN_LOW (Address = 26h)
      23.      71
      24. 7.3.17 VOUT_TRANSITION_RATE (Address = 27h)
      25.      73
      26. 7.3.18 VOUT_DROOP (Address = 28h)
      27. 7.3.19 VOUT_SCALE_LOOP (Address = 29h)
      28.      76
      29. 7.3.20 FREQUENCY_SWITCH (Address = 33h)
      30.      78
      31. 7.3.21 VIN_ON (Address = 35h)
      32.      80
      33. 7.3.22 VIN_OFF (Address = 36h)
      34.      82
      35. 7.3.23 VOUT_OV_FAULT_LIMIT (Address = 40h)
      36.      84
      37. 7.3.24 VOUT_OV_FAULT_RESPONSE (Address = 41h)
      38. 7.3.25 VOUT_OV_WARN_LIMIT (Address = 42h)
      39.      87
      40. 7.3.26 VOUT_UV_WARN_LIMIT (Address = 43h)
      41.      89
      42. 7.3.27 VOUT_UV_FAULT_LIMIT (Address = 44h)
      43.      91
      44. 7.3.28 VOUT_UV_FAULT_RESPONSE (Address = 45h)
      45. 7.3.29 IOUT_OC_FAULT_LIMIT (Address = 46h)
      46.      94
      47. 7.3.30 IOUT_OC_FAULT_RESPONSE (Address = 47h)
      48. 7.3.31 IOUT_OC_WARN_LIMIT (Address = 4Ah)
      49. 7.3.32 OT_FAULT_LIMIT (Address = 4Fh)
      50.      98
      51. 7.3.33 OT_FAULT_RESPONSE (Address = 50h)
      52. 7.3.34 OT_WARN_LIMIT (Address = 51h)
      53.      101
      54. 7.3.35 VIN_OV_FAULT_LIMIT (Address = 55h)
      55.      103
      56. 7.3.36 TON_DELAY (Address = 60h)
      57.      105
      58. 7.3.37 TON_RISE (Address = 61h)
      59. 7.3.38 TOFF_DELAY (Address = 64h)
      60. 7.3.39 TOFF_FALL (Address = 65h)
      61. 7.3.40 PIN_OP_WARN_LIMIT (Address = 6Bh)
      62.      110
      63.      111
      64.      112
      65. 7.3.41 STATUS_BYTE (Address = 78h)
      66. 7.3.42 STATUS_WORD (Address = 79h)
      67. 7.3.43 STATUS_VOUT (Address = 7Ah)
      68. 7.3.44 STATUS_IOUT (Address = 7Bh)
      69. 7.3.45 STATUS_INPUT (Address = 7Ch)
      70. 7.3.46 STATUS_TEMPERATURE (Address = 7Dh)
      71. 7.3.47 STATUS_CML (Address = 7Eh)
      72. 7.3.48 STATUS_OTHER (Address = 7Fh)
      73. 7.3.49 STATUS_MFR_SPECIFIC (Address = 80h)
      74. 7.3.50 READ_VIN (Address = 88h)
      75. 7.3.51 READ_IIN (Address = 89h)
      76. 7.3.52 READ_VOUT (Address = 8Bh)
      77. 7.3.53 READ_IOUT (Address = 8Ch)
      78. 7.3.54 READ_TEMPERATURE_1 (Address = 8Dh)
      79. 7.3.55 READ_PIN (Address = 97h)
      80. 7.3.56 PMBUS_REVISION (Address = 98h)
      81. 7.3.57 MFR_ID (Address = 99h)
      82. 7.3.58 MFR_MODEL (Address = 9Ah)
      83.      131
      84. 7.3.59 MFR_REVISION (Address = 9Bh)
      85. 7.3.60 IC_DEVICE_ID (Address = ADh)
      86. 7.3.61 IC_DEVICE_REV (Address = AEh)
      87.      135
      88. 7.3.62 EXTENDED_WRITE_PROTECT (Address = C7h)
      89. 7.3.63 NVM_PATCH_SPACE (Address = CDh)
      90. 7.3.64 CLOUD_OPTIONS (Address = CFh)
      91. 7.3.65 SYS_CFG_USER1 (Address = D0h)
      92.      140
      93. 7.3.66 SVID_ADDR_CFG_USER (Address = D1h)
      94. 7.3.67 PMBUS_ADDR (Address = D2h)
      95. 7.3.68 IMON_CAL (Address = D4h)
      96. 7.3.69 COMP (Address = D5h)
      97.      145
      98. 7.3.70 VBOOT_DCLL (Address = D6h)
      99. 7.3.71 VBOOT_OFFSET_1 (Address = D7h)
      100. 7.3.72 IIN_CAL (Address = D8h)
      101. 7.3.73 SVID_IMAX (Address = DAh)
      102.      150
      103. 7.3.74 SVID_EXT_CAPABILITY_VIDOMAX (Address = DBh)
      104. 7.3.75 FUSION_ID0 (Address = FCh)
      105. 7.3.76 FUSION_ID1 (Address = FDh)
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Inductor Selection
        2. 8.2.3.2 Input Capacitor Selection
        3. 8.2.3.3 Output Capacitor Selection
        4. 8.2.3.4 VCC/VDRV Bypass Capacitor
        5. 8.2.3.5 BOOT Capacitor Selection
        6. 8.2.3.6 RSENSE Selection
        7. 8.2.3.7 I_IN_P and I_IN_M Capacitor Selection
        8. 8.2.3.8 VRRDY Pullup Resistor Selection
        9. 8.2.3.9 PMBus® Address Resistor Selection
      4. 8.2.4 Application Curves
        1. 8.2.4.1 Thermal Performance
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

PMBus Commands

Section 7.3 lists the memory-mapped registers for the PMBus Command Map registers. All register offset addresses not listed in Section 7.3 should be considered as reserved locations and the register contents should not be modified.

Table 7-1 PMBus Commands
AddressAcronymRegister NameWrite TransactionRead TransactionSection
01hOPERATIONWrite ByteRead ByteGo
02hON_OFF_CONFIGWrite ByteRead ByteGo
03hCLEAR_FAULTSSend ByteN/AGo
0EhPASSKEYBlock WriteBlock ReadGo
10hWRITE_PROTECTWrite ByteRead ByteGo
15hSTORE_USER_ALLSend ByteN/AGo
16hRESTORE_USER_ALLSend ByteN/AGo
19hCAPABILITYN/ARead ByteGo
1BhSMBALERT_MASKWrite WordBlock Write-Block Read Process CallGo
20hVOUT_MODEN/ARead ByteGo
21hVOUT_COMMANDWrite WordRead WordGo
22hVOUT_TRIMWrite WordRead WordGo
24hVOUT_MAXN/ARead WordGo
25hVOUT_MARGIN_HIGHWrite WordRead WordGo
26hVOUT_MARGIN_LOWWrite WordRead WordGo
27hVOUT_TRANSITION_RATEWrite WordRead WordGo
28hVOUT_DROOPN/ARead WordGo
29hVOUT_SCALE_LOOPWrite WordRead WordGo
33hFREQUENCY_SWITCHWrite WordRead WordGo
35hVIN_ONWrite WordRead WordGo
36hVIN_OFFWrite WordRead WordGo
40hVOUT_OV_FAULT_LIMITWrite WordRead WordGo
41hVOUT_OV_FAULT_RESPONSEWrite ByteRead ByteGo
42hVOUT_OV_WARN_LIMITWrite WordRead WordGo
43hVOUT_UV_WARN_LIMITWrite WordRead WordGo
44hVOUT_UV_FAULT_LIMITWrite WordRead WordGo
45hVOUT_UV_FAULT_RESPONSEWrite ByteRead ByteGo
46hIOUT_OC_FAULT_LIMITWrite WordRead WordGo
47hIOUT_OC_FAULT_RESPONSEN/ARead ByteGo
4AhIOUT_OC_WARN_LIMITWrite WordRead WordGo
4FhOT_FAULT_LIMITWrite WordRead WordGo
50hOT_FAULT_RESPONSEWrite ByteRead ByteGo
51hOT_WARN_LIMITWrite WordRead WordGo
55hVIN_OV_FAULT_LIMITWrite WordRead WordGo
60hTON_DELAYWrite WordRead WordGo
61hTON_RISEWrite WordRead WordGo
64hTOFF_DELAYWrite WordRead WordGo
65hTOFF_FALLWrite WordRead WordGo
6BhPIN_OP_WARN_LIMITWrite WordRead WordGo
78hSTATUS_BYTEN/ARead ByteGo
79hSTATUS_WORDN/ARead WordGo
7AhSTATUS_VOUTWrite ByteRead ByteGo
7BhSTATUS_IOUTWrite ByteRead ByteGo
7ChSTATUS_INPUTWrite ByteRead ByteGo
7DhSTATUS_TEMPERATUREWrite ByteRead ByteGo
7EhSTATUS_CMLWrite ByteRead ByteGo
7FhSTATUS_OTHERWrite ByteRead ByteGo
80hSTATUS_MFR_SPECIFICWrite ByteRead ByteGo
88hREAD_VINN/ARead WordGo
89hREAD_IINN/ARead WordGo
8BhREAD_VOUTN/ARead WordGo
8ChREAD_IOUTN/ARead WordGo
8DhREAD_TEMPERATURE_1N/ARead WordGo
97hREAD_PINN/ARead WordGo
98hPMBUS_REVISIONN/ARead ByteGo
99hMFR_IDN/ABlock ReadGo
9AhMFR_MODELBlock WriteBlock ReadGo
9BhMFR_REVISIONBlock WriteBlock ReadGo
ADhIC_DEVICE_IDN/ABlock ReadGo
AEhIC_DEVICE_REVN/ABlock ReadGo
C7hEXTENDED_WRITE_PROTECTWrite WordRead WordGo
CDhNVM_PATCH_SPACEBlock WriteBlock ReadGo
CFhCLOUD_OPTIONSWrite ByteRead ByteGo
D0hSYS_CFG_USER1Write WordRead WordGo
D1hSVID_ADDR_CFG_USERWrite WordRead WordGo
D2hPMBUS_ADDRWrite WordRead WordGo
D4hIMON_CALWrite ByteRead ByteGo
D5hCOMPBlock WriteBlock ReadGo
D6hVBOOT_DCLLBlock WriteBlock ReadGo
D7hVBOOT_OFFSET_1Write WordRead WordGo
D8hIIN_CALWrite ByteRead ByteGo
DAhSVID_IMAXWrite WordRead WordGo
DBhSVID_EXT_CAPABILITY_VIDOMAXWrite WordRead WordGo
FChFUSION_ID0N/ARead WordGo
FDhFUSION_ID1N/ABlock ReadGo

Complex bit access types are encoded to fit into small table cells. Section 7.3 shows the codes that are used for access types in this section.

Table 7-2 PMBus Command Map Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
Write Type
WWWrite
W1CW
1C
Write
1 to clear
Reset or Default Value
-nValue after reset or the default value