Refer to the PDF data sheet for device specific package drawings
When multiple requestors contend for a single C66x CorePac resource, the conflict is resolved by granting access to the highest priority requestor. The following four resources are managed by the Bandwidth Management control hardware:
The priority level for operations initiated within the C66x CorePac are declared through registers in the C66x CorePac. These operations are:
The priority level for operations initiated outside the C66x CorePac by system peripherals is declared through the Priority Allocation Register (PRI_ALLOC), see Section 9.4 for more details. System peripherals with no fields in the PRI_ALLOC have their own registers to program their priorities.
More information on the bandwidth management features of the C66x CorePac can be found in the C66x CorePac User's Guide.