Refer to the PDF data sheet for device specific package drawings
Several of the peripherals on the C6654 and C6652 are controlled by the Power Sleep Controller (PSC). By default, the PCIe is held in reset and clock-gated. The memory in this module is also in a low-leakage sleep mode. Software is required to turn this memory on. The software enables the module (turns on clocks and deasserts reset) before this module can be used.
If one of the above modules is used in the selected ROM boot mode, the ROM code will automatically enable the module.
All other modules come up enabled by default and there is no special software sequence to enable. For more detailed information on the PSC use, see the Power Sleep Controller (PSC) for KeyStone Devices User's Guide.