6.17 Multichannel Buffered Serial Port (McBSP)
The McBSP provides these functions:
- Full-duplex communication
- Double-buffered data registers, which allow a continuous data stream
- Independent framing and clocking for receive and transmit
- Direct interface to industry-standard codecs, analog interface chips (AICs), and other serially connected analog-to-digital (A/D) and digital-to-analog (D/A) devices
- External shift clock or an internal, programmable frequency shift clock for data transfer
- Transmit and receive FIFO buffers allow the McBSP to operate at a higher sample rate by making it more tolerant to DMA latency
If an internal clock source is used, the CLKGDV field of the Sample Rate Generator Register (SRGR) must always be set to a value of 1 or greater.
For more information, see the Multichannel Buffered Serial Port (McBSP) for KeyStone Devices User's Guide.