Refer to the PDF data sheet for device specific package drawings
Two types of buses exist in the device: data buses and configuration buses. Some peripherals have both a data bus and a configuration bus interface, while others have only one type of interface. Further, the bus interface width and speed varies from peripheral to peripheral. Configuration buses are mainly used to access the register space of a peripheral and the data buses are used mainly for data transfers.
The C66x CorePac, the EDMA3 traffic controller, and the various system peripherals can be classified into two categories: masters and slaves. Masters can initiate read and write transfers in the system and do not rely on the EDMA3 for their data transfers. Slaves, on the other hand, rely on the masters to perform transfers to and from them. Examples of masters include the EDMA3 traffic controller and PCI Express. Examples of slaves include the SPI, UART, and I2C.
The masters and slaves in the device communicate through the TeraNet (switch fabric). The device contains two switch fabrics. The data switch fabric (data TeraNet) and the configuration switch fabric (configuration TeraNet). The data TeraNet, is a high-throughput interconnect mainly used to move data across the system. The data TeraNet connects masters to slaves through data buses. The configuration TeraNet is mainly used to access peripheral registers. The configuration TeraNet connects masters to slaves through configuration buses. The data TeraNet also connects to the configuration TeraNet. For more details see Section 9.2.