Refer to the PDF data sheet for device specific package drawings
The Ethernet media access controller (EMAC) module provides an efficient interface between the C6654 and C6652 DSP core processor and the networked community. The EMAC supports 10Base-T (10 Mbps), and 100BaseTX (100 Mbps), in half- or full-duplex mode, and 1000BaseT (1000 Mbps) in full-duplex mode, with hardware flow control and quality-of-service (QOS) support.
The EMAC module conforms to the IEEE 802.3-2002 standard, describing the Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer specifications. The IEEE 802.3 standard has also been adopted by ISO/IEC and redesignated as ISO/IEC 8802-3:2000(E).
Deviating from this standard, the EMAC module does not use the transmit coding error signal MTXER. Instead of driving the error pin when an underflow condition occurs on a transmitted frame, the EMAC will intentionally generate an incorrect checksum by inverting the frame CRC, so that the transmitted frame will be detected as an error by the network.
The EMAC control module is the main interface between the device core processor, the MDIO module, and the EMAC module. The relationship between these three components is shown in Figure 6-24. The EMAC control module contains the necessary components to allow the EMAC to make efficient use of device memory, plus it controls device interrupts. The EMAC control module incorporates 8KB of internal RAM to hold EMAC buffer descriptors.
For more detailed information on the EMAC/MDIO, see Gigabit Ethernet (GbE) Subsystem for KeyStone Devices User's Guide.