SWCU191 February 2022 CC1311P3 , CC1311R3 , CC2651P3 , CC2651R3 , CC2651R3SIPA
There are four logic RF-Core internal output signals called RF Core Data Out n, where n goes from 0 to 3. These signals can be mapped to DIOs. By default, RF Core Data Out 0 is set to go high when the LNA must be enabled, and RF Core Data Out 1 is set high when the PA must be enabled. Table 14-1 describes the signals. The signals can be mapped to any DIO by setting the relevant PORTID in the designated IOCFGn register.
#include <driverlib/ioc.h>
// Map RFC_GPO0 to DIOx
IOCPortConfigureSet(IOID_x, IOC_PORT_RFC_GPO0, IOC_IOMODE_NORMAL);
Port Name | PORTID | RF Core Signal | Description |
---|---|---|---|
RFC_GPO0 | 0x2F | RF Core Data Out 0 | LNA enable |
RFC_GPO1 | 0x30 | RF Core Data Out 1 | PA enable |
RFC_GPO2 | 0x31 | RF Core Data Out 2 | Synthesizer calibration running |
RFC_GPO3 | 0x32 | RF Core Data Out 3 | TX start |