SWCU191 February 2022 CC1311P3 , CC1311R3 , CC2651P3 , CC2651R3 , CC2651R3SIPA
The RF core contains an Arm® Cortex®-M0 processor that interfaces the analog RF and baseband circuits, handles data to and from the system side, and assembles the information bits in a given packet structure. The RF core offers a high-level, command-based application program interface (API) to the system CPU (Arm Cortex-M4 processor). The RF core can autonomously handle the time-critical aspects of the radio protocols (802.15.4 RF4CE and Zigbee®, Bluetooth® low energy, and so on), thus offloading the system CPU and leaving more resources for the user’s application.
The RF core has a dedicated 8 kB retention SRAM block and a 4 kB nonretention SRAM block and runs almost entirely from separate ROM. The contents of the nonretention SRAM block is lost every time the radio is powered down.