SWCU191 February 2022 CC1311P3 , CC1311R3 , CC2651P3 , CC2651R3 , CC2651R3SIPA
In off mode, the RAM block is disabled and cannot be accessed by the CPU or by the system bus (see Figure 9-4). The GPRAM space is not available in off mode.
The FLASH block has no cache support, and all accesses to the FLASH are routed directly to the FLASH block.