SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
The AES I/O buffer control and mode register (CRYPTO:AESCTL) specifies the mode of operation for the AES engine.
Internal operation of the AES module can be interrupted by setting all mode bits to 0 and writing zeroes to the length registers (CRYPTO:AESDATALEN0, CRYPTO:AESDATALEN1, and CRYPTO:AESAUTHLEN (see Section 12.7).
The length registers write the length values to the AES module. While processing, the length values decrement to 0. If both lengths are 0, the data stream is finished and a new context is requested. For basic AES modes (ECB, CBC, and CTR), a crypto length of 0 can be written if multiple streams must be processed with the same key. Writing a 0 length results in continued data requests until a new context is written. For the other modes (CBC-MAC, GCM, and CCM), no new data requests are done if the length decrements to or equals 0.
TI recommends writing a new length per packet. If the length registers decrement to 0, no new data is processed until a new context or length value is written.
When writing a new mode without writing the length registers, the values of the length register from the previous context are reused.