SPRUIX0D February   2021  – August 2021

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 EVM Revisions and Assembly Variants
  3. 2Important Usage Notes
    1. 2.1 Power-On Usage Note
  4. 3System Description
    1. 3.1 Key Features
    2. 3.2 Functional Block Diagram
    3. 3.3 Power-On/Off Procedures
      1. 3.3.1 Power-On Procedure
      2. 3.3.2 Power-Off Procedure
    4. 3.4 Peripheral and Major Component Description
      1. 3.4.1  Clocking
        1. 3.4.1.1 Ethernet PHY Clock
        2. 3.4.1.2 AM64x/AM243x Clock
        3. 3.4.1.3 PCIe Clock
      2. 3.4.2  Reset
      3. 3.4.3  Power
        1. 3.4.3.1 Power Input
        2. 3.4.3.2 Reverse Polarity Protection
        3. 3.4.3.3 Current Monitoring
        4. 3.4.3.4 Power Supply
        5. 3.4.3.5 Power Sequencing
        6. 3.4.3.6 AM64x/AM243x Power
      4. 3.4.4  Configuration
        1. 3.4.4.1 Boot Modes
      5. 3.4.5  JTAG
      6. 3.4.6  Test Automation
      7. 3.4.7  UART Interfaces
      8. 3.4.8  Memory Interfaces
        1. 3.4.8.1 DDR4 Interface
        2. 3.4.8.2 MMC Interfaces
          1. 3.4.8.2.1 Micro SD Interface
          2. 3.4.8.2.2 eMMC Interface
        3. 3.4.8.3 OSPI Interface
        4. 3.4.8.4 SPI EEPROM Interface
        5. 3.4.8.5 Board ID EEPROM Interface
      9. 3.4.9  Ethernet Interface
        1. 3.4.9.1 DP83867 PHY Default Configuration
        2. 3.4.9.2 DP83869 PHY Default Configuration
        3. 3.4.9.3 Ethernet LED
      10. 3.4.10 Display Interface
      11. 3.4.11 USB 2.0 Interface
      12. 3.4.12 PCIe Interface
      13. 3.4.13 High Speed Expansion Interface
      14. 3.4.14 CAN Interface
      15. 3.4.15 Interrupt
      16. 3.4.16 ADC Interface
      17. 3.4.17 Safety Connector
      18. 3.4.18 SPI Interfaces
      19. 3.4.19 I2C Interfaces
      20. 3.4.20 FSI Interface
  5. 4Known Issues and Modifications
    1. 4.1 Issue 1 - Embedded XDS110 Connection to AM64x Target in CCS
    2. 4.2 Issue 2 - MDIO Ethernet PHY Communications
    3. 4.3 Issue 3 - DC Barrel Jack Warning when Hot-Plugging
  6. 5References
  7. 6Revision History

3.4.10 Display Interface

The display device used on the EVM is an OSD9616P0992-10 from OSD Displays. This is a passive matrix PMOLED display with monochrome (light blue) backlight. The display has a pixel array of 96X16 and a panel size of 29.10 X 9.20 X 1.30 (mm) and an active area of 21.1 X 3.5 (mm). The display is connected to the 14-Pin FPC connector on the EVM having part number 10051922-1410ELF from Amphenol ICC and the pin details are mentioned in Table 3-21.

Table 3-21 Display Connector (J36) Pin-Out
Pin No. Signal
1 C2P
2 C2N
3 C1P
4 C1N
5 VDDB
6 NC
7 VSS
8 VDD
9 RES#
10 SCL
11 SDA
12 IREF
13 VCOMH
14 VCC