SPRUIX0D February 2021 – August 2021
Applicable EVM Revisions: E2
Issue Description: On some EVM, U78 MDIO MUX path has been shown to result in intermittent MDIO PHY communication between the AM64x SoC and CPSW and ICSSG Ethernet PHY.
Workaround: Modifications number 4 and 5 are applied to the assembly. These modifications result in the HSE header losing access to the HSE_PRG0_PRU1_GPO18 and HSE_PRG0_PRU1_GPO19 signals.
Modification 4 description:
Modification 5 description: