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Product details

Parameters

Bus voltage (Max) (V) 24 Power switch MOSFET Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 8 Peak output current (A) 6 Rise time (ns) 10 Operating temperature range (C) -40 to 125 Rating Catalog Number of channels (#) 2 Fall time (ns) 5 Prop delay (ns) 14 Iq (uA) 350 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) 0 Features Synchronous Rectification open-in-new Find other Half-bridge drivers

Package | Pins | Size

SOIC (D) 8 19 mm² 3.91 x 4.9 VSON (DRB) 8 9 mm² 3 x 3 open-in-new Find other Half-bridge drivers

Features

  • Drives Two N-Channel MOSFETs with 14-ns Adaptive Dead Time
  • Wide Gate Drive Voltage: 4.5 V Up to 8.8 V With Best Efficiency at 7 V to 8 V
  • Wide Power System Train Input Voltage: 3 V Up to 27 V
  • Wide Input PWM Signals: 2.0 V up to 13.2-V Amplitude
  • Capable to Drive MOSFETs with ≥40-A Current per Phase
  • High Frequency Operation: 14-ns Propagation Delay and 10-ns Rise/Fall Time Allow FSW – 2 MHz
  • Capable to Propagate <30-ns Input PWM Pulses
  • Low-Side Driver Sink On-Resistance (0.4 Ω) Prevents dV/dT Related Shoot-Through Current
  • 3-State PWM Input for Power Stage Shutdown
  • Space Saving Enable (Input) and Power Good (Output) Signals on Same Pin
  • Thermal Shutdown
  • UVLO Protection
  • Internal Bootstrap Diode
  • Economical SOIC-8 and Thermally Enhanced 3-mm x 3-mm DFN-8 Packages
  • High Performance Replacement for Popular 3-State Input Drivers
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Description

The is a high-speed driver for N-channel complimentary driven power MOSFETs with adaptive dead-time control. This driver is optimized for use in variety of high-current one and multi-phase DC-to-DC converters. The is a solution that provides high efficiency, small size and low EMI emissions.

The efficiency is achieved by up to 8.8-V gate drive voltage, 14-ns adaptive dead-time control, 14-ns propagation delays and high-current 2-A source and 4-A sink drive capability. The 0.4-Ω impedance for the lower gate driver holds the gate of power MOSFET below its threshold and ensures no shoot-through current at high dV/dt phase node transitions. The bootstrap capacitor charged by an internal diode allows use of N-channel MOSFETs in a half-bridge configuration.

open-in-new Find other Half-bridge drivers
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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Design tools & simulation

SIMULATION MODELS Download
SLUM287.ZIP (36 KB) - PSpice Model
SIMULATION MODELS Download
SLUM289.TSC (83 KB) - TINA-TI Reference Design
SIMULATION MODELS Download
SLUM290.ZIP (29 KB) - TINA-TI Spice Model
SIMULATION MODELS Download
SLUM496.ZIP (3 KB) - PSpice Model

Reference designs

REFERENCE DESIGNS Download
36Vdc-75Vdc Input, 20V @ 4A Output, Active Clamp Forward
PMP3799 — The PMP3799 reference design provides an adjustible 20V output at 4A from a standard 48V telecom input with greater than 93% efficiency. This design uses the UCC2897A active clamp controller along with an ISO721 digital isolator and TPS28225 to drive synchronous rectifiers. The output voltage can be (...)
REFERENCE DESIGNS Download
18Vdc-54Vdc Input, 24V @ 5A Output, Active Clamp Forward
PMP4844 — The PMP4844 reference design provides an isolated 24V output at 120W from an 18V to 54V telecom input with up to 94% efficiency. This design uses the UCC2897A active clamp controller along with an ISO721 digital isolator and TPS28225 to drive synchronous rectifiers. The circuit is built in an (...)
REFERENCE DESIGNS Download
36Vdc-75Vdc Input, 6V @ 20A Output, Active Clamp Forward
PMP4123 — The PMP4123 reference design provides 6V at 120W from a standard 48V telecom input with greater than 94% efficiency. This design uses the UCC2897A active clamp controller along with an ISO721 digital isolator and TPS28225 to drive synchronous rectifiers. The circuit is built in an industry standard (...)
REFERENCE DESIGNS Download
48V Input 3.3V/30A with Output Pre-bias
PMP5997 — This reference design generates a 3.3V/100W output from a standard 48V telecom input and allows for a pre-biased output. The UCC2897A controls operation of the active clamp power stage. The drive signal for the synchronous rectifiers is sent to the secondary side through an ISO7220 digital isolator (...)
Design files

CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options
SON (DRB) 8 View options

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