Product details

Bus voltage (Max) (V) 24 Power switch MOSFET Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 8 Peak output current (A) 6 Rise time (ns) 10 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 3.5 Rating Catalog Number of channels (#) 2 Fall time (ns) 5 Prop delay (ns) 14 Iq (uA) 350 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) 0 Features Synchronous Rectification Driver configuration Single
Bus voltage (Max) (V) 24 Power switch MOSFET Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 8 Peak output current (A) 6 Rise time (ns) 10 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 3.5 Rating Catalog Number of channels (#) 2 Fall time (ns) 5 Prop delay (ns) 14 Iq (uA) 350 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) 0 Features Synchronous Rectification Driver configuration Single
SOIC (D) 8 19 mm² 3.91 x 4.9 VSON (DRB) 8 9 mm² 3 x 3
  • Drives Two N-Channel MOSFETs with 14-ns Adaptive Dead Time
  • Wide Gate Drive Voltage: 4.5 V Up to 8.8 V With Best Efficiency at 7 V to 8 V
  • Wide Power System Train Input Voltage: 3 V Up to 27 V
  • Wide Input PWM Signals: 2.0 V up to 13.2-V Amplitude
  • Capable to Drive MOSFETs with ≥40-A Current per Phase
  • High Frequency Operation: 14-ns Propagation Delay and 10-ns Rise/Fall Time Allow FSW – 2 MHz
  • Capable to Propagate <30-ns Input PWM Pulses
  • Low-Side Driver Sink On-Resistance (0.4 Ω) Prevents dV/dT Related Shoot-Through Current
  • 3-State PWM Input for Power Stage Shutdown
  • Space Saving Enable (Input) and Power Good (Output) Signals on Same Pin
  • Thermal Shutdown
  • UVLO Protection
  • Internal Bootstrap Diode
  • Economical SOIC-8 and Thermally Enhanced 3-mm x 3-mm DFN-8 Packages
  • High Performance Replacement for Popular 3-State Input Drivers
  • Drives Two N-Channel MOSFETs with 14-ns Adaptive Dead Time
  • Wide Gate Drive Voltage: 4.5 V Up to 8.8 V With Best Efficiency at 7 V to 8 V
  • Wide Power System Train Input Voltage: 3 V Up to 27 V
  • Wide Input PWM Signals: 2.0 V up to 13.2-V Amplitude
  • Capable to Drive MOSFETs with ≥40-A Current per Phase
  • High Frequency Operation: 14-ns Propagation Delay and 10-ns Rise/Fall Time Allow FSW – 2 MHz
  • Capable to Propagate <30-ns Input PWM Pulses
  • Low-Side Driver Sink On-Resistance (0.4 Ω) Prevents dV/dT Related Shoot-Through Current
  • 3-State PWM Input for Power Stage Shutdown
  • Space Saving Enable (Input) and Power Good (Output) Signals on Same Pin
  • Thermal Shutdown
  • UVLO Protection
  • Internal Bootstrap Diode
  • Economical SOIC-8 and Thermally Enhanced 3-mm x 3-mm DFN-8 Packages
  • High Performance Replacement for Popular 3-State Input Drivers

The is a high-speed driver for N-channel complimentary driven power MOSFETs with adaptive dead-time control. This driver is optimized for use in variety of high-current one and multi-phase DC-to-DC converters. The is a solution that provides high efficiency, small size and low EMI emissions.

The efficiency is achieved by up to 8.8-V gate drive voltage, 14-ns adaptive dead-time control, 14-ns propagation delays and high-current 2-A source and 4-A sink drive capability. The 0.4-Ω impedance for the lower gate driver holds the gate of power MOSFET below its threshold and ensures no shoot-through current at high dV/dt phase node transitions. The bootstrap capacitor charged by an internal diode allows use of N-channel MOSFETs in a half-bridge configuration.

The is a high-speed driver for N-channel complimentary driven power MOSFETs with adaptive dead-time control. This driver is optimized for use in variety of high-current one and multi-phase DC-to-DC converters. The is a solution that provides high efficiency, small size and low EMI emissions.

The efficiency is achieved by up to 8.8-V gate drive voltage, 14-ns adaptive dead-time control, 14-ns propagation delays and high-current 2-A source and 4-A sink drive capability. The 0.4-Ω impedance for the lower gate driver holds the gate of power MOSFET below its threshold and ensures no shoot-through current at high dV/dt phase node transitions. The bootstrap capacitor charged by an internal diode allows use of N-channel MOSFETs in a half-bridge configuration.

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Technical documentation

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Type Title Date
* Data sheet TPS28225 High-Frequency 4-A Sink Synchronous MOSFET Drivers datasheet (Rev. D) 30 Sep 2015
Application note External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Oct 2018
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage 17 Apr 2018
More literature Power Loss Calculation for Sync Buck Converter 14 Feb 2007

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

TPS28225 PSpice Transient Model

SLUM287.ZIP (36 KB) - PSpice Model
Simulation model

TPS28225 TINA-TI Transient Reference Design

SLUM289.TSC (83 KB) - TINA-TI Reference Design
Simulation model

TPS28225 TINA-TI Transient Spice Model

SLUM290.ZIP (29 KB) - TINA-TI Spice Model
Simulation model

TPS28225 Unencrypted PSpice Transient Model

SLUM496.ZIP (3 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs

PMP3799 — 36Vdc-75Vdc Input, 20V @ 4A Output, Active Clamp Forward

The PMP3799 reference design provides an adjustible 20V output at 4A from a standard 48V telecom input with greater than 93% efficiency. This design uses the UCC2897A active clamp controller along with an ISO721 digital isolator and TPS28225 to drive synchronous rectifiers. The output voltage can (...)
Reference designs

PMP4844 — 18Vdc-54Vdc Input, 24V @ 5A Output, Active Clamp Forward

The PMP4844 reference design provides an isolated 24V output at 120W from an 18V to 54V telecom input with up to 94% efficiency. This design uses the UCC2897A active clamp controller along with an ISO721 digital isolator and TPS28225 to drive synchronous rectifiers. The circuit is built in an (...)
Reference designs

PMP4123 — 36Vdc-75Vdc Input, 6V @ 20A Output, Active Clamp Forward

The PMP4123 reference design provides 6V at 120W from a standard 48V telecom input with greater than 94% efficiency. This design uses the UCC2897A active clamp controller along with an ISO721 digital isolator and TPS28225 to drive synchronous rectifiers. The circuit is built in an industry (...)
Reference designs

PMP5997 — 48V Input 3.3V/30A with Output Pre-bias

This reference design generates a 3.3V/100W output from a standard 48V telecom input and allows for a pre-biased output. The UCC2897A controls operation of the active clamp power stage. The drive signal for the synchronous rectifiers is sent to the secondary side through an ISO7220 digital (...)
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SOIC (D) 8 View options
SON (DRB) 8 View options

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