NEU

MSPM0G3519

AKTIV

80 MHz ARM® Cortex®-M0+ MCU mit Dual-Bank 512 kB Flash, 128 kB SRAM, 2xCAN-FD, 2xADC, DAC, COMP

Produktdetails

CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 512 RAM (kByte) 128 ADC type 12-bit SAR Features 5-V-tolerant I/Os, AES encryption, CAN FD, Comparator, DAC, DMA, MATHACL, RTC UART 7 CAN (#) CAN-FD Number of ADC channels 15, 19, 27 SPI 3 Hardware accelerators Trigonometric math accelerator Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface CAN-FD, I2C, LIN, SPI, UART Operating system FreeRTOS, Zephyr RTOS Nonvolatile memory (kByte) 512 Number of GPIOs 28, 44, 60, 74, 94 Number of I2Cs 3 Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection
CPU Arm Cortex-M0+ Frequency (MHz) 80 Flash memory (kByte) 512 RAM (kByte) 128 ADC type 12-bit SAR Features 5-V-tolerant I/Os, AES encryption, CAN FD, Comparator, DAC, DMA, MATHACL, RTC UART 7 CAN (#) CAN-FD Number of ADC channels 15, 19, 27 SPI 3 Hardware accelerators Trigonometric math accelerator Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface CAN-FD, I2C, LIN, SPI, UART Operating system FreeRTOS, Zephyr RTOS Nonvolatile memory (kByte) 512 Number of GPIOs 28, 44, 60, 74, 94 Number of I2Cs 3 Security Cryptographic acceleration, Hardware-enforced isolation, Secure boot, Secure communication, Secure debug, Secure firmware & software update, Secure storage, Software IP protection
LQFP (PM) 64 144 mm² 12 x 12 LQFP (PN) 80 196 mm² 14 x 14 LQFP (PT) 48 81 mm² 9 x 9 LQFP (PZ) 100 256 mm² 16 x 16 NFBGA (ZAW) 100 81 mm² 9 x 9 VQFN (RGZ) 48 49 mm² 7 x 7 VQFN (RHB) 32 25 mm² 5 x 5
  • Core
    • Arm 32-bit Cortex M0+ CPU with memory protection unit, frequency up to 80MHz
  • PSA-L1 Certification targeted
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 512KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates

    • 16KB data flash bank with ECC protection
    • 128KB total SRAM
      • SRAM (Bank 0): 64kB SRAM with ECC protection or hardware parity, and retention down to STANDBY mode
      • SRAM (Bank 1): 64kB SRAM with retention down to STOP mode
  • High-performance analog peripherals
    • Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
      • 14-bit effective resolution at 250ksps with hardware averaging
    • Three high-speed comparators (COMP) with integrated 8-bit reference DACs
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • One 12-bit 1Msps digital-to-analog converter (DAC) with integrated output buffer
    • Programmable analog connections between ADC, COMP and DAC
    • Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 123µA/MHz (CoreMark)
    • SLEEP: 38µA/MHz
    • STOP: 223µA at 4MHz
    • STANDBY: 1.7µA at 32kHz with RTC and SRAM Bank 0 and state retention
    • SHUTDOWN: 92nA with IO wake-up capability
  • Intelligent digital peripherals
    • 12-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC and TRIG computations
    • Nine timers support up to 28 PWM channels
      • Two 16-bit general-purpose timers support QEI
      • Four 16-bit general-purpose timers support low-power operation in STANDBY mode
      • One 32-bit general-purpose timer
      • Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Seven UART interfaces
      • Two supporting LIN, IrDA, DALI, Smart Card, Manchester
      • Three supporting low-power operation in STANDBY mode
    • Three I2C interfaces supporting up to FM+ (1Mbit/s), SMBus/PMBus, and wakeup from STOP mode
    • Three SPI interfaces, with one supporting up to 32Mbits/s
    • Two Controller Area Network (CAN) interfaces support CAN 2.0 A or B and CAN-FD
  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80MHz
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Data integrity and encryption
    • AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • True random number generator (TRNG)
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 94 GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Four high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 100-pin nFBGA (ZAW) (0.8mm pitch)
    • 100-pin LQFP (PZ) (0.5mm pitch)
    • 80-pin LQFP (PN) (0.5mm pitch)
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch)
    • 42-pin DSBGA (YCJ) (0.35mm pitch) - Preview
    • 32-pin VQFN (RHB) (0.5mm pitch)
  • Family members (also see Device Comparison)
    • MSPM0G1518: 256KB flash, 128KB RAM
    • MSPM0G1519: 512KB flash, 128KB RAM
    • MSPM0G3518: 256KB flash, 128KB RAM
    • MSPM0G3519: 512KB flash, 128KB RAM
  • Development kits and software (also see Tools and Software)
  • Core
    • Arm 32-bit Cortex M0+ CPU with memory protection unit, frequency up to 80MHz
  • PSA-L1 Certification targeted
  • Operating characteristics
    • Extended temperature: –40°C up to 125°C
    • Wide supply voltage range: 1.62V to 3.6V
  • Memories
    • Up to 512KB of flash memory with error correction code (ECC)
      • Dual-bank with address swap for OTA updates

    • 16KB data flash bank with ECC protection
    • 128KB total SRAM
      • SRAM (Bank 0): 64kB SRAM with ECC protection or hardware parity, and retention down to STANDBY mode
      • SRAM (Bank 1): 64kB SRAM with retention down to STOP mode
  • High-performance analog peripherals
    • Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
      • 14-bit effective resolution at 250ksps with hardware averaging
    • Three high-speed comparators (COMP) with integrated 8-bit reference DACs
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • One 12-bit 1Msps digital-to-analog converter (DAC) with integrated output buffer
    • Programmable analog connections between ADC, COMP and DAC
    • Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
    • Integrated temperature sensor
  • Optimized low-power modes
    • RUN: 123µA/MHz (CoreMark)
    • SLEEP: 38µA/MHz
    • STOP: 223µA at 4MHz
    • STANDBY: 1.7µA at 32kHz with RTC and SRAM Bank 0 and state retention
    • SHUTDOWN: 92nA with IO wake-up capability
  • Intelligent digital peripherals
    • 12-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC and TRIG computations
    • Nine timers support up to 28 PWM channels
      • Two 16-bit general-purpose timers support QEI
      • Four 16-bit general-purpose timers support low-power operation in STANDBY mode
      • One 32-bit general-purpose timer
      • Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces
    • Seven UART interfaces
      • Two supporting LIN, IrDA, DALI, Smart Card, Manchester
      • Three supporting low-power operation in STANDBY mode
    • Three I2C interfaces supporting up to FM+ (1Mbit/s), SMBus/PMBus, and wakeup from STOP mode
    • Three SPI interfaces, with one supporting up to 32Mbits/s
    • Two Controller Area Network (CAN) interfaces support CAN 2.0 A or B and CAN-FD
  • Clock system
    • Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80MHz
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4 to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Data integrity and encryption
    • AES-128/256 accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • True random number generator (TRNG)
    • Cyclic redundancy checker (CRC-16, CRC-32)
  • Flexible I/O features
    • Up to 94 GPIOs
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Four high-speed IOs
  • Development support
    • 2-pin serial wire debug (SWD)
  • Package options
    • 100-pin nFBGA (ZAW) (0.8mm pitch)
    • 100-pin LQFP (PZ) (0.5mm pitch)
    • 80-pin LQFP (PN) (0.5mm pitch)
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch)
    • 42-pin DSBGA (YCJ) (0.35mm pitch) - Preview
    • 32-pin VQFN (RHB) (0.5mm pitch)
  • Family members (also see Device Comparison)
    • MSPM0G1518: 256KB flash, 128KB RAM
    • MSPM0G1519: 512KB flash, 128KB RAM
    • MSPM0G3518: 256KB flash, 128KB RAM
    • MSPM0G3519: 512KB flash, 128KB RAM
  • Development kits and software (also see Tools and Software)

MSPM0Gx51x microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 256KB to 512KB of flash memory in small packages or high pin count packages (up to 100 pins). These devices include dual CAN-FD controllers, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

The device has up to 512KB of embedded flash program memory with built-in error correction code (ECC) and up to 128KB SRAM (with ECC and parity protection for the first 64kB). The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes, as well as a TRNG entropy source. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as two simultaneously sampling 12-bit, 4Msps ADCs supporting up to 27 external channels, on-chip voltage reference (1.4V or 2.5V), one 12-bit 1Msps DAC, and three comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs .

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their project’s needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0Gx51x MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.

MSPM0Gx51x microcontrollers (MCUs) are part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm Cortex-M0+ 32-bit core platform, operating at up to 80MHz frequency. These MCUs offer a blend of cost optimization and design flexibility for applications requiring 256KB to 512KB of flash memory in small packages or high pin count packages (up to 100 pins). These devices include dual CAN-FD controllers, cybersecurity enablers, high performance integrated analog, and provide excellent low power performance across the operating temperature range.

The device has up to 512KB of embedded flash program memory with built-in error correction code (ECC) and up to 128KB SRAM (with ECC and parity protection for the first 64kB). The flash memory is organized into two main banks to support field firmware updates, with address swap support provided between the two main banks.

Flexible cybersecurity enablers can be used to support secure boot, secure in-field firmware updates, IP protection (execute-only memory), key storage, and more. Hardware acceleration is provided for a variety of AES symmetric cipher modes, as well as a TRNG entropy source. The cybersecurity architecture is pending Arm® PSA Level 1 certification.

A set of high performance analog modules is provided, such as two simultaneously sampling 12-bit, 4Msps ADCs supporting up to 27 external channels, on-chip voltage reference (1.4V or 2.5V), one 12-bit 1Msps DAC, and three comparators operable in low-power and high-speed modes with additional built-in 8-bit reference DACs .

The TI MSPM0 family of low-power MCUs consists of devices with varying degrees of analog and digital integration allowing for customers find the MCU that meets their project’s needs. The MSPM0 MCU platform combines the Arm Cortex-M0+ platform with a holistic ultra-low-power system architecture, allowing system designers to increase performance while reducing energy consumption.

MSPM0Gx51x MCUs are supported by an extensive hardware and software ecosystem with reference designs and code examples to get the design started quickly. Development kits include a LaunchPad available for purchase. TI also provides a free MSPM0 Software Development Kit (SDK), which is available as a component of Code Composer Studio™ IDE desktop and cloud version within the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSP Academy, and online support through the TI E2E™ support forums.

For complete module descriptions, see the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet MSPM0Gx51x Mixed-Signal Microcontrollers With CAN-FD Interface datasheet (Rev. B) PDF | HTML 13 Okt 2025
* Errata MSPM0Gx51x Mixed-Signal Microcontrollers Errata (Rev. D) PDF | HTML 10 Dez 2025
* User guide MSPM0 G-Series 80-MHz Microcontrollers Technical Reference Manual (Rev. C) 19 Aug 2025
Application note Live Firmware Update via Flash Bank Swap PDF | HTML 30 Jan 2026
Application note Dual Wheel Control Design in Projector based on MSPM0 MCU PDF | HTML 23 Jan 2026
User guide MSPM0 Bootloader User's Guide (Rev. A) PDF | HTML 08 Jan 2026
Application note Cybersecurity Enablers in MSPM0 MCUs (Rev. A) PDF | HTML 10 Dez 2025
Application note EMC Improvement Guide for MSPM0 (Rev. A) PDF | HTML 02 Dez 2025
Application note Local Interconnect Network (LIN) Automatic Baud Rate Detection Mechanism for MSPM0 Devices PDF | HTML 25 Nov 2025
Application note MSPM0 ADC Noise Analysis and Application (Rev. A) PDF | HTML 14 Nov 2025
Subsystem design I2C IO Expander PDF | HTML 30 Sep 2025
Subsystem design ADC to I2C (Rev. A) PDF | HTML 10 Sep 2025
Subsystem design ADC to UART (Rev. A) PDF | HTML 09 Sep 2025
Subsystem design Thermistor Temperature Sensing (Rev. A) PDF | HTML 09 Sep 2025
Subsystem design ADC to SPI (Rev. A) PDF | HTML 27 Aug 2025
Subsystem design Digital FIR Filter (Rev. A) PDF | HTML 27 Aug 2025
User guide MSPM0 MCUs Development Guide (Rev. G) PDF | HTML 27 Aug 2025
Subsystem design Digital IIR Filter (Rev. A) PDF | HTML 26 Aug 2025
Subsystem design Power Sequencer (Rev. A) PDF | HTML 25 Aug 2025
Subsystem design 5V Interface (Rev. A) PDF | HTML 20 Aug 2025
Subsystem design Data Sensor Aggregator Subsystem Design (Rev. A) PDF | HTML 20 Aug 2025
Subsystem design CAN to I2C Bridge (Rev. A) PDF | HTML 19 Aug 2025
Subsystem design CAN to SPI Bridge (Rev. A) PDF | HTML 19 Aug 2025
Subsystem design CAN to UART bridge (Rev. A) PDF | HTML 19 Aug 2025
Subsystem design PWM Control Using Push-Buttons PDF | HTML 14 Aug 2025
Subsystem design Using MSPM0 as a Watchdog Timer PDF | HTML 14 Aug 2025
Subsystem design Emulate EEPROM with FLASH (Type A) (Rev. A) PDF | HTML 13 Aug 2025
Functional safety information Functional Safety Manual for MSPM0Gx51x PDF | HTML 13 Aug 2025
Subsystem design Emulate EEPROM With FLASH (Type B) (Rev. A) PDF | HTML 06 Aug 2025
Subsystem design Frequency Counter: Tone Detection (Rev. A) PDF | HTML 06 Aug 2025
Subsystem design Simultaneous Sampling of ADCs PDF | HTML 30 Jun 2025
Analog Design Journal Choosing a position sensor in motor control PDF | HTML 27 Jun 2025
Application note Capturing PWM 0% to 100% Duty Cycle with MSPM0 MCU PDF | HTML 12 Jun 2025
Application note Migration Guide From STM8 to MSPM0 (Rev. A) PDF | HTML 21 Mai 2025
Application note Getting Started with the MCAN (CAN FD) Module on MSPM0 MCUs PDF | HTML 29 Apr 2025
Application note IAR to CCS Project Porting Guide PDF | HTML 15 Mär 2025
White paper MSPM0 MCU Advantages in Automotive Application PDF | HTML 11 Mär 2025
Application note LIN Basics and Implementation on MSPM0 PDF | HTML 21 Feb 2025
Application note Laser Speckle Reduction Solution in Projector based on MSPM0 MCU PDF | HTML 20 Feb 2025
User guide Migration Guide From NXP to MSPM0 PDF | HTML 03 Feb 2025
Application note Closed Loop Constant Power Drive to Simplify Heater Element Control and Extend Battery Life PDF | HTML 29 Jan 2025
Application note Flash Multi Bank Feature in MSPM0 Family PDF | HTML 08 Jan 2025
Application note BQ79616 Control Based on MSPM0 Through UART to CAN PDF | HTML 16 Dez 2024
Application note MSPM0G3507 Low Power Test and Guidance PDF | HTML 18 Okt 2024
Application note Understanding the MSPM0 Debug Subsystem PDF | HTML 23 Sep 2024
Application note A2L Refrigerant Standard Overview and TI Mitigation Control Board Designs for Designers PDF | HTML 16 Sep 2024
Application note TPS929xxx LED Driver Control Using MSPM0 Through UART Over CAN PDF | HTML 04 Sep 2024
Application note SPI to CAN Bridge on MSPM0 MCUs PDF | HTML 28 Aug 2024
Application brief Bridge Design Between CAN and SPI with MSPM0 MCUs PDF | HTML 17 Jun 2024
Application brief Bridge Design Between CAN and UART with MSPM0 MCUs PDF | HTML 17 Jun 2024
Application brief Bridge Design between CAN and I2C with MSPM0 MCUs 17 Jun 2024
Application note Designing Temperature Monitoring Systems with NTC and RTD PDF | HTML 15 Mai 2024
Application brief Automotive Seat Comfort Module Using MSPM0 PDF | HTML 01 Mai 2024
Application note Realization of Password-Protected Debug Based on Software PDF | HTML 06 Mär 2024
Product overview Realizing UWB Passive Entry Passive Start (PEPS) Design with MSPM0 MCU PDF | HTML 12 Jan 2024
Technical article Why interoperability matters to an evolving EV charging market PDF | HTML 05 Jan 2024
Product overview Realizing HVAC FAN Control Design with MSPM0 MCU PDF | HTML 21 Dez 2023
Application note MSPM0 Enables Cost-Effective Field Transmitter Applications PDF | HTML 15 Dez 2023
Application note Operating Time of MSPM0 Powered by a Capacitor PDF | HTML 03 Okt 2023
Application note EEPROM Emulation Type A Solution PDF | HTML 18 Apr 2023
Application note EEPROM Emulation Type B Design PDF | HTML 11 Apr 2023
Application brief Increasing Flexibility in Your Battery Management Designs With a Low-Cost MSPM0 PDF | HTML 02 Mär 2023
Application brief Optimizing Field Sensor and Transmitter Applications With MSPM0 MCUs PDF | HTML 02 Mär 2023
Application brief Simplifying Pulse Oximeter Designs With Low-Cost Highly Integrated MSPM0 MCUs PDF | HTML 02 Mär 2023
Application note MSPM0 G-Series MCUs Power Optimization Guide PDF | HTML 22 Feb 2023
White paper MSPM0: Idea to Product With Easy-to-Use Tools, Software, and Academy PDF | HTML 22 Feb 2023
Application note Make System Design Easy With MSPM0 Precision Analog PDF | HTML 22 Feb 2023
Application note MSPM0L or MSPM0G: How to Pick the Right MSP Microcontroller for Your Application PDF | HTML 13 Dez 2022

Design und Entwicklung

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GUI für Evaluierungsmodul (EVM)

LP-MSPM0G3507-OOBE Out-of-box experience GUI for LP-MSPM0G3507

Out-of-box experience GUI for LP-MSPM0G3507
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GUI für Evaluierungsmodul (EVM)

MSPM0-ANALOG-CONFIGURATOR Analog Configurator for MSPM0

The MSPM0 analog configurator is a graphical configuration tool designed to simplify and accelerate the design and enablement of an analog signal chain using a MSPM0 device with no traditional coding development necessary.

The tool uses an intuitive GUI to configure a signal chain using the high (...)

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Erste Schritte

CCSTUDIO-STARTHUB Example application browser

Explore a vast library of example projects, categorized by application type, with support for multiple development environments
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Erste Schritte

MSP-MOTOR-CONTROL MSPM0 Firmware solutions for motor control applications

MSP Motor Control is a collection of software, tools and examples to spin motors in 30 minutes or less with MSPM0 Arm® Cortex® M0+ MCUs and popular motor driver solutions.

MSP Motor Control provides examples for supported hardware kits to spin brushed, stepper, and three-phase motors with sensored (...)

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Erste Schritte

TI-DEVELOPER-ZONE Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
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IDE, Konfiguration, Compiler oder Debugger

CCSTUDIO Code Composer Studio integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

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IDE, Konfiguration, Compiler oder Debugger

GHS-3P-MULTI-IDE — Green Hills Software MULTI Integrated Development Environment

The MULTI® development environment has been in use by thousands of developers for three decades and is the industry’s unrivaled integrated development environment to create, debug, and optimize C, C++ and Ada  code for production-focused applications.  It brings together (...)
IDE, Konfiguration, Compiler oder Debugger

MSP-ZERO-CODE-STUDIO Graphical development environment for designing applications for MSP microcontrollers

MSP Zero Code Studio is a visual design environment that simplifies firmware development, making it possible to configure, develop, and run microcontroller applications in minutes with zero coding and no IDE required. Available as a standalone download or on the cloud.

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IDE, Konfiguration, Compiler oder Debugger

SYSCONFIG Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

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Onlineschulungen

MSPM0-ACADEMY MSPM0 Academy

MSPM0 Academy delivers easy-to-use training modules that span a wide range of topics and LaunchPads in the MSPM0 MCU portfolio.
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Betriebssystem (BS)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
Software-Programmiertool

MSP-GANG-SOFTWARE MSP-GANG Software

The MSP Gang Programmer (MSP-GANG) is a MSPM0/MSP430/MSP432 device programmer that can program up to eight identical devices at the same time.
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Software-Programmiertool

UNIFLASH UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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Berechnungstool

MSPM0-CALC Power estimation tool for the MSPM0 platform

This tool can be used by engineers to estimate power consumption in different modes of operation for the MSPM0 device family.
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Referenzdesigns

TIDA-010247 — Batteriemanagement-Einheit mit hoher Genauigkeit, Referenzdesign für 48- bis 1500-V-Energiespeichers

Dieses Referenzdesign ist eine Batteriemanagement-Einheit (Battery Management Unit, BMU) mit High-Side-MOSFET-N-Kanal-Steuerung (bis zu 32s) und verwendet die gestapelte BQ769x2-Batteriemonitorfamilie. Dieses Design integriert zudem eine CAN-Schnittstelle für Anwendungen mit (...)
Design guide: PDF
Referenzdesigns

TIDA-010279 — Referenzdesign für bis zu 1500 V stapelbare Batteriemanagement-Einheiten für Energiespeichersysteme

Dieses Referenzdesign ist ein Lithium-Ionen- (Li-Ion) und Lithium-Eisenphosphat- (LiFePO4) Akkupack (52 s) zur vollständigen Zellentemperaturmessung und mit hoher Zellenspannungsgenauigkeit. Das Design überwacht die Spannung und Temperatur jeder einzelnen Zelle und schützt den Akku, damit er (...)
Design guide: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
LQFP (PM) 64 Ultra Librarian
LQFP (PN) 80 Ultra Librarian
LQFP (PT) 48 Ultra Librarian
LQFP (PZ) 100 Ultra Librarian
NFBGA (ZAW) 100 Ultra Librarian
VQFN (RGZ) 48 Ultra Librarian
VQFN (RHB) 32 Ultra Librarian

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Empfohlene Produkte können Parameter, Evaluierungsmodule oder Referenzdesigns zu diesem TI-Produkt beinhalten.

Support und Schulungen

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