RF430F5978
- True System-In-Package Based On MSP430 Microcontroller With Sub-1-GHz Transceiver System-On-Chip (SoC) and Additional 3D LF Wake-up and Transponder Interface
- Wide Supply Voltage Range: 3.6 V Down To 1.8 V
- Ultra-Low Power Consumption
- CPU Active Mode (AM): 160 µA/MHz
- Standby Mode (LPM3 Real-Time Clock [RTC] Mode): 2.0 µA
- Off Mode (LPM4 RAM Retention): 1.0 µA
- Radio in Receive: 15 mA, 250 kbps, 915 MHz
- MSP430 System and Peripherals
- 16-Bit RISC Architecture, Extended Memory, up to 20-MHz System Clock
- Wake up From Standby Mode in Less Than 6 µs
- Flexible Power-Management System With SVS and Brownout
- Unified Clock System With FLL
- 16-Bit Timer TA0, Timer_A With Five Capture/Compare Registers
- 16-Bit Timer TA1, Timer_A With Three Capture/Compare Registers
- Hardware RTC
- Two Universal Serial Communication Interfaces (USCIs)
- USCI_A0 Supports UART, IrDA, SPI
- USCI_B0 Supports I2C, SPI
- 12-Bit Analog-to-Digital Converter (ADC) With Internal Reference, Sample-and-Hold, and Autoscan Features
- Comparator
- 128-Bit AES Security Encryption and Decryption Coprocessor
- 32-Bit Hardware Multiplier
- 3-Channel Internal DMA
- Serial Onboard Programming, No External Programming Voltage Needed
- Embedded Emulation Module (EEM)
- High-Performance Sub-1-GHz Radio Frequency (RF) Transceiver Core
- Same as in CC1101
- Wide Supply Voltage Range: 2 V to 3.6 V
- Frequency Bands: 300 MHz to 348 MHz, 389 MHz to 464 MHz, and 779 MHz to 928 MHz
- Programmable Data Rate From 0.6 kBaud to 500 kBaud
- High Sensitivity (–117 dBm at 0.6 kBaud, –111 dBm at 1.2 kBaud, 315 MHz, 1% Packet Error Rate)
- Excellent Receiver Selectivity and Blocking Performance
- Programmable Output Power up to +12 dBm for All Supported Frequencies
- 2-FSK, 2-GFSK, and MSK Supported as Well as OOK and Flexible ASK Shaping
- Flexible Support for Packet-Oriented Systems: On-Chip Support for Sync Word Detection, Address Check, Flexible Packet Length, and Automatic CRC Handling
- Support for Automatic Clear Channel Assessment (CCA) Before Transmitting (for Listen-Before-Talk Systems)
- Digital RSSI Output
- Suited for Systems Targeting Compliance With EN 300 220 (Europe) and FCC CFR Part 15 (US)
- Suited for Systems Targeting Compliance With Wireless M-Bus Standard EN 13757-4:2005
- Support for Asynchronous and Synchronous Serial Receive and Transmit Mode for Backward Compatibility With Existing Radio Communication Protocols
- High-Performance Low-Frequency (LF) Interface
- 3D Wake-up Receiver
- Low Standby Current Consumption: 4.4 µA
- Regular Sensitivity Mode: 3.7 mVpp → Approximate 3-m Wake Range
- High Sensitivity Mode: 0.5 mVpp → Approximate 6-m Wake Range
- Low Sensitivity Variation
- Digital RSSI, 72 dB, 8-Bit Logarithmic
- Two Independent Wake Patterns, 0-Bit to 24-Bit Length
- Dedicated Sensitivity Levels for Both Wake Patterns
- Integrated LF Bit Stream Data Decoding and Digital Data Output
- AES-128 Hardware Encryption Coprocessor
- Resonant Frequency: 134.2 kHz
- Embedded Resonant Trimming for All Three Resonant Circuits
- 3D Transponder Interface
- Transponder Read Range up to 4 in (10 cm), Power Received From LF RF Field
- Half-Duplex (HDX) Communication Protocol
- Selectable Challenge/Response Length: 32/32, 64/64, or 96/64 Bit
- Mutual Authentication For All Commands With 32-Bit Reader Signature
- Burst Read Mode
- Anticollision Encryption
- EEPROM Memory Size of 2048 Bytes
- Available User EEPROM is 1776 Bytes
- Encryption Keys 4 × 128 Bits
- Configurable Page Types for Selective Access Grant
- All Pages Lockable (No Reprogramming Possible)
- Switch Interface With up to Eight Inputs
- 3D Wake-up Receiver
The TI RF430F5978 system-in-package adds a 3D low-frequency (LF) wake-up and transponder interface to the CC430 ultra-low-power microcontroller system-on-chip (SoC) with integrated sub-1-GHz RF transceiver. This architecture allows activation and deactivation of the device in a dedicated and well-defined area "on-demand" to achieve extended battery life for the whole system. The embedded LF transponder interface is always functional even without battery supply and offers the highest level of security through its 128-bit AES encryption for challenge/response and mutual authentication. The embedded LF transponder interface also adds 2KB of programmable EEPROM memory to the system.
The CC430 ultra-low-power microcontroller system-on-chip (SoC) combines the CC1101 sub-1-GHz RF transceiver with the powerful MSP430 16-bit RISC CPU. Sixteen-bit registers and constant generators contribute to maximum code efficiency. The RF430F5978 device features the MSP430 CPUXV2, 32KB of in-system programmable flash memory, 4KB of RAM, two 16-bit timers, a high-performance 12-bit ADC with six external inputs plus internal temperature and battery sensors, a comparator, two USCIs, a 128-bit AES security accelerator, a hardware multiplier, DMA, and an RTC module with alarm capabilities.
The RF430F5978 provides a tight integration between the microcontroller core, its peripherals, software, and the integrated sub-1-GHz RF transceiver and 3D LF transceiver for wake-up and transponder interface, making these solutions easy to use while improving performance.
For complete module descriptions, see the (SLAU378).
TI 提供有限的設計支援
使用此產品的現有專案具備有限的 TI 設計支援。若有提供，您可在此頁面找到相關資訊、工具和軟體。使用此產品的現有設計具備有限的 TI 設計支援。在TI E2E™ 支援論壇中索取有限的設計支援。
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | RF430F5978 MSP430™ System-in-Package With Sub-1-GHz Transceiver and 3D LF Wake-up and Transponder Interface datasheet (Rev. A) | PDF | HTML | 2015/10/28 | ||
| 白皮書 | Navigating your way through the RFID jungle | 2014/2/20 | ||||
| 使用指南 | RF430F59xx Family User's Guide | 2012/8/6 |
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGC) | 64 | Ultra Librarian |