SLUUCP8B June 2024 – October 2026 BQ41Z50
| Class | Subclass | Name | Type | Min | Max | Default | Unit |
|---|---|---|---|---|---|---|---|
| Settings | AFE | OCD 1 Delay 2 | H1 | 0x0 | 0x1F | 0x1F | Hex |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | RSVD | RSVD | SC_OCD1_FAULT_DLY2_4 | SC_OCD1_FAULT_DLY2_3 | SC_OCD1_FAULT_DLY2_2 | SC_OCD1_FAULT_DLY2_1 | SC_OCD1_FAULT_DLY2_0 |
| RSVD (Bits 7 - 5): Reserved. Do not use. | ||
| SC_OCD1_FAULT_DLY2_4 (Bit 4-0): bit4 of the OCD1_FAULT delay 2. | ||
| SC_OCD1_FAULT_DLY2_3 (Bit 3): bit 3 of the OCD1_FAULT delay 2. | ||
| SC_OCD1_FAULT_DLY2_2 (Bit 2): bit 2 of the OCD1_FAULT delay 2. | ||
| SC_OCD1_FAULT_DLY2_1 (Bit 1): bit 1 of the OCD1_FAULT delay 2. | ||
| SC_OCD1_FAULT_DLY2_0 (Bit 0): bit 0 of the OCD1_FAULT delay 2. | ||