| SC_CC_WAKE_DLY1_7
(Bits
7):
bit
6 of the CC_WAKE delay_1 |
|
| SC_CC_WAKE_DLY1_6 (Bit 6): bit 6 of the CC_WAKE delay_1
. |
| SC_CC_WAKE_DLY1_5 (Bit 4): bit 5 of the CC_WAKE delay_1
. |
| SC_CC_WAKE_DLY1_4 (Bit 4): bit 4 of the CC_WAKE delay_1
. |
| SC_CC_WAKE_DLY1_3 (Bit 3): bit 3 of the CC_WAKE delay_1
. |
| SC_CC_WAKE_DLY1_2 (Bit 2): bit 2 of the CC_WAKE delay_1
. |
| SC_CC_WAKE_DLY1_1 (Bit 1): bit 1 of the CC_WAKE delay_1
. |
| SC_CC_WAKE_DLY1_0 (Bit 0): bit 0 of the CC_WAKE delay_1
. |
| DLY2 has to be
written first and then DLY1. OCC Wake Delay is (CC_WAKE_DLY2 *256 +
CC_WAKE_DLY1 ) * 0.187ms. 0x000 is disabled, 0x001 is 187 us, 0x002
is 354 us, 0x003 is 541 us, .., 0x1ff is 1.53s. |