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Radiation Hardened 3Amp Sink/Source DDR Termination Regulator w/ Built-in VREF

TPS7H3301-SP

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Product details

Parameters

DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3 Control mode S3, S4/S5 Iout VTT (Max) (A) 3 Iq (Typ) (mA) 18 Output VREF, VTT Vin (Min) (V) 0.9 Vin (Max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (C) -55 to 125, 25 to 25 open-in-new Find other DDR memory power ICs

Package | Pins | Size

CFP (HKR) 16 106 mm² 11 x 9.6 open-in-new Find other DDR memory power ICs

Features

  • 5962R14228(1):
    • Radiation hardness assurance (RHA) qualified to total ionizing dose (TID) 100 krad(Si)
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune to LET = 70 MeV-cm2/mg(2)
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized to 70 MeV-cm2/mg(2)
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail(3)
  • Separate low-voltage input (VLDOIN) down to
    0.9 V for improved power efficiency(3)
  • 3-A sink and source termination regulator includes droop compensation
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference
    • ±15-mV accuracy
    • ±10-mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated

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Description

The TPS7H3301-SP is a TID and SEE radiation-hardened double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3301-SP supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR4. The fast transient response of the TPS7H3301-SP VTT regulator allows for a very stable supply during read/write conditions. During transients, the fast tracking feature of the VTTREF supply minimizes any voltage offset between VTT/Vo and VTTREF. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3301-SP. The PGOOD output is open-drain so it can be tied to multiple open-drain outputs to monitor when all supplies have come into regulation. The enable signal can also be used to discharge VTT/Vo during suspend to RAM (S3) power down mode.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet TPS7H3301-SP Sink and Source Radiation-Hardened 3-A DDR Termination Regulator With Built-In VTTREF Buffer datasheet (Rev. B) Jun. 30, 2020
* Radiation & reliability report TPS7H3301-SP Neutron Displacement Damage Characterization Apr. 12, 2019
* Radiation & reliability report TPS7H3301-SP Single-Event Effects Radiation Report (Rev. A) Jan. 25, 2017
* SMD TPS7H3301-SP SMD 5962-14228 Jul. 08, 2016
* Radiation & reliability report TPS7H3301-SP Total Ionizing Dose Radiation Report Jul. 01, 2016
User guide TPS7H3301EVM-CVAL User's Guide (Rev. B) Oct. 30, 2020
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer Aug. 21, 2020
Application note DDR VTT Power Solutions: A Competitive Analysis (Rev. A) Jul. 09, 2020
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations May 18, 2020
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form May 18, 2020
Application note Single-Event Effects Confidence Interval Calculations Jan. 14, 2020
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing Jun. 17, 2019
E-book Preview: Radiation Handbook for Electronics (Rev. A) Jun. 07, 2019
E-book Radiation Handbook for Electronics (Rev. A) May 21, 2019
Selection guide TI Space Products (Rev. G) May 15, 2019
Application note TI Space Rated Power Solution for Microsemi® RTG4™ FPGA (Rev. A) Jul. 27, 2018
Application note External Soft-Start Circuit for TPS7H3301-SP Power-Up Sequencing Applications Jul. 07, 2016
Technical articles 7 things to know about spacecraft subsystems before your next trip to Mars Jul. 06, 2016

Design & development

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Hardware development

EVALUATION BOARD Download
899
Description

TPS7H3301-SP source/sink Double Data Rate (DDR) termination regulator designed to support system needs for low noise applications.

Integrated solution with reduced system solution size, improved efficiency, and simple system design integration.

Features
  • Source Sink Linear Regulator supporting current up to 3A
  • Low output noise
  • Small size
  • Support DDR, DDR2, DDR3 and DDR4 applications
  • Integrated solution that:
    • Reduces the system solution size
    • Improves efficiency
    • Simplifies design integration
DEVELOPMENT KIT Download
Description
This is a development kit for the Xilinx® XQRKU060 FPGA with industrial -1 speed grade. ADA-SDEV-KIT2 has a modular board design with a XRTC-compatible configuration module, two FMC connectors, DDR3 DRAM, system monitoring, and space-grade TI power management and temperature-sensing solutions.

Design tools & simulation

SIMULATION MODEL Download
SLVMBF1B.ZIP (116 KB) - PSpice Model
SIMULATION MODEL Download
SLVMDD2.ZIP (196 KB) - PSpice Model
CALCULATION TOOL Download
SLVC650A.ZIP (97 KB)

CAD/CAE symbols

Package Pins Download
CFP (HKR) 16 View options

Ordering & quality

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  • MSL rating/Peak reflow
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  • Qualification summary
  • Ongoing reliability monitoring

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