SLVA959B November   2018  – October 2021 DRV10866 , DRV10963 , DRV10964 , DRV10970 , DRV10974 , DRV10975 , DRV10983 , DRV10983-Q1 , DRV10987 , DRV11873 , DRV3205-Q1 , DRV3220-Q1 , DRV3245E-Q1 , DRV3245Q-Q1 , DRV8301 , DRV8302 , DRV8303 , DRV8304 , DRV8305 , DRV8305-Q1 , DRV8306 , DRV8307 , DRV8308 , DRV8312 , DRV8313 , DRV8320 , DRV8320R , DRV8323 , DRV8323R , DRV8332 , DRV8343-Q1 , DRV8350 , DRV8350R , DRV8353 , DRV8353R , DRV8412 , DRV8701 , DRV8702-Q1 , DRV8702D-Q1 , DRV8703-Q1 , DRV8703D-Q1 , DRV8704 , DRV8711 , DRV8800 , DRV8801 , DRV8801-Q1 , DRV8801A-Q1 , DRV8802 , DRV8802-Q1 , DRV8803 , DRV8804 , DRV8805 , DRV8806 , DRV8811 , DRV8812 , DRV8813 , DRV8814 , DRV8816 , DRV8818 , DRV8821 , DRV8823 , DRV8823-Q1 , DRV8824 , DRV8824-Q1 , DRV8825 , DRV8828 , DRV8829 , DRV8830 , DRV8832 , DRV8832-Q1 , DRV8833 , DRV8833C , DRV8834 , DRV8835 , DRV8836 , DRV8837 , DRV8837C , DRV8838 , DRV8839 , DRV8840 , DRV8841 , DRV8842 , DRV8843 , DRV8844 , DRV8846 , DRV8847 , DRV8848 , DRV8850 , DRV8860 , DRV8870 , DRV8871 , DRV8871-Q1 , DRV8872 , DRV8872-Q1 , DRV8873-Q1 , DRV8880 , DRV8881 , DRV8884 , DRV8885 , DRV8886 , DRV8886AT , DRV8889-Q1

 

  1.   Trademarks
  2. 1Grounding Optimization
    1. 1.1 Frequently Used Terms/Connections
    2. 1.2 Using a Ground Plane
      1. 1.2.1 Two-Layer Board Techniques
    3. 1.3 Common Problems
      1. 1.3.1 Capacitive and Inductive Coupling
      2. 1.3.2 Common and Differential Noise
    4. 1.4 EMC Considerations
  3. 2Thermal Overview
    1. 2.1 PCB Conduction and Convection
    2. 2.2 Continuous Top-Layer Thermal Pad
    3. 2.3 Copper Thickness
    4. 2.4 Thermal Via Connections
    5. 2.5 Thermal Via Width
    6. 2.6 Summary of Thermal Design
  4. 3Vias
    1. 3.1 Via Current Capacity
    2. 3.2 Via Layout Recommendations
      1. 3.2.1 Multi-Via Layout
      2. 3.2.2 Via Placement
  5. 4General Routing Techniques
  6. 5Bulk and Bypass Capacitor Placement
    1. 5.1 Bulk Capacitor Placement
    2. 5.2 Charge Pump Capacitor
    3. 5.3 Bypass/Decoupling Capacitor Placement
      1. 5.3.1 Near Power Supply
      2. 5.3.2 Near Power Stage
      3. 5.3.3 Near Switch Current Source
      4. 5.3.4 Near Current Sense Amplifiers
      5. 5.3.5 Near Voltage Regulators
  7. 6MOSFET Placement and Power Stage Routing
    1. 6.1 Common Power MOSFET Packages
      1. 6.1.1 DPAK
      2. 6.1.2 D2PAK
      3. 6.1.3 TO-220
      4. 6.1.4 8-Pin SON
    2. 6.2 MOSFET Layout Configurations
    3. 6.3 Power Stage Layout Design
      1. 6.3.1 Switch Node
      2. 6.3.2 High-Current Loop Paths
      3. 6.3.3 VDRAIN Sense Pin
  8. 7Current Sense Amplifier Routing
    1. 7.1 Single High-Side Current Shunt
    2. 7.2 Single Low-Side Current Shunt
    3. 7.3 Two-Phase and Three-Phase Current Shunt Amplifiers
    4. 7.4 Component Selection
    5. 7.5 Placement
    6. 7.6 Routing
    7. 7.7 Useful Tools (Net Ties and Differential Pairs)
    8. 7.8 Input and Output Filters
    9. 7.9 Do's and Don'ts
  9. 8References
  10. 9Revision History

1.3.2 Common and Differential Noise

Differential mode noise travels down a trace to a receiving device and then back to the source through a return path, causing a differential voltage between the two traces. Common mode noise occurs when a voltage is generated on both the signal and the return path caused by a voltage drop across a shared impedance. Ground bounce is an example of common mode noise. The possibility for this problem to occur is decreased significantly by making sure all return paths to the source are wide, short, and low impedance traces.

GUID-BD2EFFAB-1745-46FA-A8D1-F6099FA9EA39-low.gifFigure 1-5 Differential-Mode vs Common-Mode Noise