Product details

DSP 1 C55x DSP MHz (Max) 50, 100 CPU 16-bit Operating system DSP/BIOS, VLX Rating Catalog Operating temperature range (C) -10 to 70, -40 to 85
DSP 1 C55x DSP MHz (Max) 50, 100 CPU 16-bit Operating system DSP/BIOS, VLX Rating Catalog Operating temperature range (C) -10 to 70, -40 to 85
NFBGA (ZAY) 144 144 mm² 12 x 12
  • CORE:
    • High-Performance, Low-Power, TMS320C55x Fixed-Point Digital Signal Processor
      • 20-, 10-ns Instruction Cycle Time
      • 50-, 100-MHz Clock Rate
      • One or Two Instructions Executed per Cycle
      • Dual Multiply-and-Accumulate Units (Up to 200 Million Multiply-Accumulates per Second [MMACS])
      • Two Arithmetic and Logic Units (ALUs)
      • Three Internal Data and Operand Read Buses and Two Internal Data and Operand Write Buses
      • Software-Compatible with C55x Devices
      • Industrial Temperature Devices Available
    • 320KB of Zero-Wait State On-Chip RAM, Composed of:
      • 64KB of Dual-Access RAM (DARAM), 8 Blocks of 4K x 16-Bit
      • 256KB of Single-Access RAM (SARAM), 32 Blocks of 4K x 16-Bit
    • 128KB of Zero Wait-State On-Chip ROM
      (4 Blocks of 16K x 16-Bit)
    • Tightly Coupled FFT Hardware Accelerator
  • PERIPHERAL:
    • Direct Memory Access (DMA) Controller
      • Four DMA with 4 Channels Each (16 Channels Total)
    • Three 32-Bit General-Purpose (GP) Timers
      • One Selectable as a Watchdog or GP
    • Two Embedded Multimedia Card (eMMC) or Secure Digital (SD) Interfaces
    • Universal Asynchronous Receiver/Transmitter (UART)
    • Serial Port Interface (SPI) with Four Chip Selects
    • Master and Slave Inter-Integrated Circuit (I2C Bus)
    • Four Inter-IC Sound (I2S Bus) for Data Transport
    • Device USB Port with Integrated 2.0 High-Speed PHY that Supports:
      • USB 2.0 Full- and High-Speed Device
    • LCD Bridge with Asynchronous Interface
    • 10-Bit 4-Input Successive Approximation (SAR) ADC
    • IEEE-1149.1 (JTAG)
      Boundary-Scan-Compatible
    • 32 General-Purpose I/O (GPIO) Pins
      (Multiplexed with Other Device Functions)
      • Configure Up to 20 GPIO Pins at the Same Time
  • POWER:
    • Four Core Isolated Power Supply Domains: Analog, RTC, CPU and Peripherals, and USB
    • Three I/O Isolated Power Supply Domains: RTC I/O, USB PHY, and DVDDIO
    • Three integrated LDOs (DSP_LDO, ANA_LDO, and USB_LDO) to power the isolated domains: DSP Core, Analog, and USB Core, respectively
    • 1.05-V Core (50 MHz), 1.8-, 2.5-, 2.75-, or 3.3-V I/Os
    • 1.3-V Core (100 MHz), 1.8-, 2.5-, 2.75-, or 3.3-V I/Os
  • CLOCK:
    • Real-Time Clock (RTC) with Crystal Input, Separate Clock Domain, and Separate Power Supply
    • Low-Power Software Programmable Phase-Locked Loop (PLL) Clock Generator
  • BOOTLOADER:
    • On-Chip ROM Bootloader (RBL) to Boot From SPI EEPROM, SPI Serial Flash or I2C EEPROM eMMC, SD, SDHC, UART, and USB
  • PACKAGE:
    • 144-Terminal Pb-Free Plastic BGA (Ball Grid Array) (ZHH Suffix)

All trademarks are the property of their respective owners.

  • CORE:
    • High-Performance, Low-Power, TMS320C55x Fixed-Point Digital Signal Processor
      • 20-, 10-ns Instruction Cycle Time
      • 50-, 100-MHz Clock Rate
      • One or Two Instructions Executed per Cycle
      • Dual Multiply-and-Accumulate Units (Up to 200 Million Multiply-Accumulates per Second [MMACS])
      • Two Arithmetic and Logic Units (ALUs)
      • Three Internal Data and Operand Read Buses and Two Internal Data and Operand Write Buses
      • Software-Compatible with C55x Devices
      • Industrial Temperature Devices Available
    • 320KB of Zero-Wait State On-Chip RAM, Composed of:
      • 64KB of Dual-Access RAM (DARAM), 8 Blocks of 4K x 16-Bit
      • 256KB of Single-Access RAM (SARAM), 32 Blocks of 4K x 16-Bit
    • 128KB of Zero Wait-State On-Chip ROM
      (4 Blocks of 16K x 16-Bit)
    • Tightly Coupled FFT Hardware Accelerator
  • PERIPHERAL:
    • Direct Memory Access (DMA) Controller
      • Four DMA with 4 Channels Each (16 Channels Total)
    • Three 32-Bit General-Purpose (GP) Timers
      • One Selectable as a Watchdog or GP
    • Two Embedded Multimedia Card (eMMC) or Secure Digital (SD) Interfaces
    • Universal Asynchronous Receiver/Transmitter (UART)
    • Serial Port Interface (SPI) with Four Chip Selects
    • Master and Slave Inter-Integrated Circuit (I2C Bus)
    • Four Inter-IC Sound (I2S Bus) for Data Transport
    • Device USB Port with Integrated 2.0 High-Speed PHY that Supports:
      • USB 2.0 Full- and High-Speed Device
    • LCD Bridge with Asynchronous Interface
    • 10-Bit 4-Input Successive Approximation (SAR) ADC
    • IEEE-1149.1 (JTAG)
      Boundary-Scan-Compatible
    • 32 General-Purpose I/O (GPIO) Pins
      (Multiplexed with Other Device Functions)
      • Configure Up to 20 GPIO Pins at the Same Time
  • POWER:
    • Four Core Isolated Power Supply Domains: Analog, RTC, CPU and Peripherals, and USB
    • Three I/O Isolated Power Supply Domains: RTC I/O, USB PHY, and DVDDIO
    • Three integrated LDOs (DSP_LDO, ANA_LDO, and USB_LDO) to power the isolated domains: DSP Core, Analog, and USB Core, respectively
    • 1.05-V Core (50 MHz), 1.8-, 2.5-, 2.75-, or 3.3-V I/Os
    • 1.3-V Core (100 MHz), 1.8-, 2.5-, 2.75-, or 3.3-V I/Os
  • CLOCK:
    • Real-Time Clock (RTC) with Crystal Input, Separate Clock Domain, and Separate Power Supply
    • Low-Power Software Programmable Phase-Locked Loop (PLL) Clock Generator
  • BOOTLOADER:
    • On-Chip ROM Bootloader (RBL) to Boot From SPI EEPROM, SPI Serial Flash or I2C EEPROM eMMC, SD, SDHC, UART, and USB
  • PACKAGE:
    • 144-Terminal Pb-Free Plastic BGA (Ball Grid Array) (ZHH Suffix)

All trademarks are the property of their respective owners.

These devices are members of TI's C5000 fixed-point Digital Signal Processor (DSP) product family and are designed for low-power applications.

The fixed-point DSP is based on the TMS320C55x DSP generation CPU processor core. The C55x DSP architecture achieves high performance and low power through increased parallelism and total focus on power savings. The CPU supports an internal bus structure that is composed of one program bus, one 32-bit data read bus and two 16-bit data read buses, two 16-bit data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to four 16-bit data reads and two 16-bit data writes in a single cycle. The device also includes four DMA controllers, each with 4 channels, providing data movement for 16-independent channel contexts without CPU intervention. Each DMA controller can perform one 32-bit data transfer per cycle, in parallel and independent of the CPU activity.

The C55x CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit x 17-bit multiplication and a 32-bit add in a single cycle. A central 40-bit arithmetic and logic unit (ALU) is supported by an additional 16-bit ALU. Use of the ALUs is under instruction set control, providing the ability to optimize parallel activity and power consumption. These resources are managed in the Address Unit (AU) and Data Unit (DU) of the C55x CPU.

The C55x CPU supports a variable byte width instruction set for improved code density. The Instruction Unit (IU) performs 32-bit program fetches from internal or external memory and queues instructions for the Program Unit (PU). The PU decodes the instructions, directs tasks to the AU and DU resources, and manages the fully protected pipeline. Predictive branching capability avoids pipeline flushes on execution of conditional instructions.

The general-purpose input and output functions, along with the 10-bit SAR ADC on the TMS320C5535, provide sufficient pins for status, interrupts, and bit I/O for LCD displays, keyboards, and media interfaces. Serial media is supported through two secure digital (SD) peripherals, four Inter-IC Sound (I2S Bus) modules, one serial port interface (SPI) with up to four chip selects, one I2C multimaster and slave interface, and a universal asynchronous receiver/transmitter (UART) interface.

Additional peripherals include: a high-speed Universal Serial Bus (USB 2.0) device mode only (not available on TMS320C5532), a real-time clock (RTC), three general-purpose timers with one configurable as a watchdog timer, and an analog phase-locked loop (APLL) clock generator.

In addition, the TMS320C5535 includes a tightly coupled FFT Hardware Accelerator. The tightly coupled FFT Hardware Accelerator supports 8- to 1024-point (in power of 2) real and complex-valued FFTs.

Furthermore, the device includes the following three integrated LDOs to power different sections of the device.

ANA_LDO (all devices) provides 1.3 V to the DSP PLL (VDDA_PLL), SAR, and power-management circuits (VDDA_ANA).

DSP_LDO (TMS320C5535 and 'C5534) provides 1.3 V or 1.05 V to the DSP core (CVDD), selectable on-the-fly by software as long as operating frequency ranges are observed. For lowest power operation, the programmer can shut down the internal DSP_LDO, cutting power to the DSP core (CVDD) while an external supply provides power to the RTC (CVDDRTC and DVDDRTC). The RTC alarm interrupt or the WAKEUP pin can re-enable the internal DSP_LDO and re-apply power to the DSP core. When DSP_LDO comes out of reset, it is enabled to 1.3 V for the bootloader to operate. For the 50-MHz devices, DSP_LDO must be programmed to 1.05 V to match the core voltage, CVDD, for proper operation after reset.

USB_LDO (TMS320C5535, 'C5534, and 'C5533) provides 1.3 V to the USB core digital (USB_VDD1P3) and PHY circuits (USB_VDDA1P3).

These devices are supported by the industry’s award-winning eXpressDSP, Code Composer Studio Integrated Development Environment (IDE), DSP/BIOS, Texas Instruments’ algorithm standard, and the industry’s largest third-party network. Code Composer Studio IDE features code generation tools including a C Compiler and Linker, RTDX, XDS100, XDS510, XDS560 emulation device drivers, and evaluation modules. The devices are also supported by the C55x DSP library which features more than 50 foundational software kernels (FIR filters, IIR filters, FFTs, and various math functions) as well as chip support libraries.

These devices are members of TI's C5000 fixed-point Digital Signal Processor (DSP) product family and are designed for low-power applications.

The fixed-point DSP is based on the TMS320C55x DSP generation CPU processor core. The C55x DSP architecture achieves high performance and low power through increased parallelism and total focus on power savings. The CPU supports an internal bus structure that is composed of one program bus, one 32-bit data read bus and two 16-bit data read buses, two 16-bit data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to four 16-bit data reads and two 16-bit data writes in a single cycle. The device also includes four DMA controllers, each with 4 channels, providing data movement for 16-independent channel contexts without CPU intervention. Each DMA controller can perform one 32-bit data transfer per cycle, in parallel and independent of the CPU activity.

The C55x CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit x 17-bit multiplication and a 32-bit add in a single cycle. A central 40-bit arithmetic and logic unit (ALU) is supported by an additional 16-bit ALU. Use of the ALUs is under instruction set control, providing the ability to optimize parallel activity and power consumption. These resources are managed in the Address Unit (AU) and Data Unit (DU) of the C55x CPU.

The C55x CPU supports a variable byte width instruction set for improved code density. The Instruction Unit (IU) performs 32-bit program fetches from internal or external memory and queues instructions for the Program Unit (PU). The PU decodes the instructions, directs tasks to the AU and DU resources, and manages the fully protected pipeline. Predictive branching capability avoids pipeline flushes on execution of conditional instructions.

The general-purpose input and output functions, along with the 10-bit SAR ADC on the TMS320C5535, provide sufficient pins for status, interrupts, and bit I/O for LCD displays, keyboards, and media interfaces. Serial media is supported through two secure digital (SD) peripherals, four Inter-IC Sound (I2S Bus) modules, one serial port interface (SPI) with up to four chip selects, one I2C multimaster and slave interface, and a universal asynchronous receiver/transmitter (UART) interface.

Additional peripherals include: a high-speed Universal Serial Bus (USB 2.0) device mode only (not available on TMS320C5532), a real-time clock (RTC), three general-purpose timers with one configurable as a watchdog timer, and an analog phase-locked loop (APLL) clock generator.

In addition, the TMS320C5535 includes a tightly coupled FFT Hardware Accelerator. The tightly coupled FFT Hardware Accelerator supports 8- to 1024-point (in power of 2) real and complex-valued FFTs.

Furthermore, the device includes the following three integrated LDOs to power different sections of the device.

ANA_LDO (all devices) provides 1.3 V to the DSP PLL (VDDA_PLL), SAR, and power-management circuits (VDDA_ANA).

DSP_LDO (TMS320C5535 and 'C5534) provides 1.3 V or 1.05 V to the DSP core (CVDD), selectable on-the-fly by software as long as operating frequency ranges are observed. For lowest power operation, the programmer can shut down the internal DSP_LDO, cutting power to the DSP core (CVDD) while an external supply provides power to the RTC (CVDDRTC and DVDDRTC). The RTC alarm interrupt or the WAKEUP pin can re-enable the internal DSP_LDO and re-apply power to the DSP core. When DSP_LDO comes out of reset, it is enabled to 1.3 V for the bootloader to operate. For the 50-MHz devices, DSP_LDO must be programmed to 1.05 V to match the core voltage, CVDD, for proper operation after reset.

USB_LDO (TMS320C5535, 'C5534, and 'C5533) provides 1.3 V to the USB core digital (USB_VDD1P3) and PHY circuits (USB_VDDA1P3).

These devices are supported by the industry’s award-winning eXpressDSP, Code Composer Studio Integrated Development Environment (IDE), DSP/BIOS, Texas Instruments’ algorithm standard, and the industry’s largest third-party network. Code Composer Studio IDE features code generation tools including a C Compiler and Linker, RTDX, XDS100, XDS510, XDS560 emulation device drivers, and evaluation modules. The devices are also supported by the C55x DSP library which features more than 50 foundational software kernels (FIR filters, IIR filters, FFTs, and various math functions) as well as chip support libraries.

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Technical documentation

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Type Title Date
* Data sheet TMS320C5535, 'C5534, 'C5533, 'C5532 Fixed-Point Digital Signal Processors datasheet (Rev. C) 23 Apr 2014
* Errata TMS320C5532/5533/5534/5535 MicroStar BGA Discontinued and Redesigned 20 May 2020
* Errata TMS320C5535/34/33/32 Fixed-Point DSP Silicon Errata (Silicon Revision 2.2) (Rev. C) 15 Jul 2015
Application note How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A) 19 May 2021
Application note TMS320C5505/15/35/45 schematic checklist 14 Feb 2019
Technical article Bringing the next evolution of machine learning to the edge 27 Nov 2018
Technical article How quality assurance on the Processor SDK can improve software scalability 22 Aug 2018
Application note Using the TMS320C5545/35/34/33/32 Bootloader (Rev. D) 31 Jul 2018
White paper Voice as the user interface – a new era in speech processing white Paper 09 May 2017
Application note Migrating From TMS320C5535 to TMS320C5545 (Rev. A) 06 Oct 2016
Application note MEMS Microphone Direct PDM Input via I2S to a C5515 EVM With Software Decimation 22 Sep 2016
Application note Usage Guidelines for C55x On-Chip Low Dropout Regulators (LDOs) 26 Jul 2016
Technical article Clove: Low-Power video solutions based on Sitara™ AM57x processors 21 Jul 2016
User guide TMS320C5545/35/34/33/32 ULP DSP Technical Reference Manual (Rev. H) 06 Apr 2016
Application note Power Estimation and Pwr Consumption Sum for TMS320C5504/05/14/15/32/33/34/35/45 (Rev. A) 04 Apr 2016
Application note Instructions to Benchmark C55 DSP Library 01 Apr 2016
Technical article TI's new DSP Benchmark Site 08 Feb 2016
Application note C5000 DSP-Based Low-Power System Design 30 Nov 2015
Application note Migrating from TMS320C5515/05 to TMS320C5535/34/33/32 (Rev. A) 22 Dec 2011
User guide TMS320C55x DSP Peripherals Overview Reference Guide (Rev. K) 15 Dec 2011
User guide TMS320C55x Assembly Language Tools User's Guide (Rev. I) 09 Nov 2011
User guide TMS320C55x Optimizing C/C++ Compiler User's Guide (Rev. G) 09 Nov 2011
More literature TMS320C553x-Industry’s Lowest Power DSPs Now at the Unbelievable Price of $1.95 (Rev. B) 13 Sep 2011
More literature TMS320C5535 eZdsp™ USB Development Kit 29 Aug 2011
User guide TMS320C55x v3.x DSP Algebraic Instruction Set Reference Guide (Rev. E) 24 Jun 2009
User guide TMS320C55x v3.x DSP Mnemonic Instruction Set Reference Guide (Rev. E) 24 Jun 2009
User guide TMS320C55x DSP v3.x CPU Reference Guide (Rev. E) 17 Jun 2009

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TMDX5535EZDSP — C5535/C5545 eZdsp USB Stick Development Kit

The TMDX5535eZdsp is a small form factor, very low cost USB-powered DSP development kit which includes all the hardware and software needed to evaluate the C553x and C5545 DSP families, which are the industry’s lowest-cost and lowest power 16-bit DSP. This ultra-low-cost kit allows quick and (...)

In stock
Limit: 1
Debug probe

TMDSEMU200-U — XDS200 USB Debug Probe

The XDS200 is a debug probe (emulator) used for debugging TI embedded devices.  The XDS200 features a balance of low cost with good performance as compared to the low cost XDS110 and the high performance XDS560v2.  It supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a (...)

In stock
Limit: 3
Debug probe

TMDSEMU560V2STM-U — XDS560v2 System Trace USB Debug Probe

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

In stock
Limit: 1
Debug probe

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB & Ethernet Debug Probe

The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

In stock
Limit: 1
Application software & framework

AUDIOCAPDSP-C55X — Bootimg.bin for Audio Capacitive Touch BoosterPack

Bootimg.bin is the program boot file for the Audio Capacitive Touch Booster Pack. It should be used when the file is accidentally deleted from the SD card and the Audio Capacitive Touch Booster Pack is unable to boot.
Application software & framework

AUDIOCAPHOST-MSP430 — LaunchPad Host Application for Audio Capacitive Touch Booster Pack

This application software runs on the MSP430G2553 on theMSP430 LaunchPad Value Line Development Kit with the Audio Capacitive Touch Booster Pack - taking user inputs and controlling the C55x DSP on theAudio Capacitive Touch Booster Pack.
Application software & framework

C55X-AUDIOFRAMEWORK — C55x Connected Audio Framework

The TMS320C55x™ Connected Audio Framework provides a software framework which allows the C55x devices to operate as a USB Audio peripheral. In addition to providing this capability, the framework can be extended by users by the incorporation of audio processing algorithms in the record and (...)
Driver or library

SPRC100 — TMS320C55x DSP Library (DSPLIB)

The DSP Library (DSPLIB) is a collection of high-level optimized DSP function modules for the C55x DSP platform. This source-code library includes C-callable functions (ANSI-C language compatible) for general signal processing math and vector functions that have been ported to C55x DSPs. The (...)
Driver or library

SPRC133 — TMS320C55x Chip Support Libraries (CSL) – Standard and Low-Power

The C55x Chip Support Libraries (CSL) provide an application programming interface (API) used for configuring and controlling the DSP on-chip peripherals for ease of use, compatibility between various C55x devices and hardware abstraction. CSLs will shorten development time by providing (...)
Driver or library

TELECOMLIB — Telecom and Media Libraries - FAXLIB, VoLIB and AEC/AER for TMS320C64x+ and TMS320C55x Processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)
Software codec

ADT-3P-DSPVOIPCODECS — Adaptive Digital Technologies DSP VOIP, speech and audio codecs

Adaptive Digital is a developer of voice quality enhancement algorithms, and best-in-class acoustic echo cancellation software that work with TI DSPs. Adaptive Digital has extensive experience in the algorithm development, implementation, optimization and configuration tuning. They provide (...)
From: Adaptive Digital Technologies, Inc.
Software codec

ALGOT-3P-DSPVOIPCODECS — Algotron C5000 DSP telecom and audio codecs

Algotron provides C5000 DSP software modules for telecoms & audio. Examples are: modem data pumps, speech coders, signal generators & detectors for DTMF and caller ID. All modules feature simple yet flexible interfaces with full re-entrancy. They come with user's guides, example (...)
From: Algotron
Software codec

COUTH-3P-DSPVOIPCODECS — CouthIT DSP VoIP, speech, and audio codecs

Since 1999, CouthIT has been helping customers transform their ideas into real-time robust software solutions. They license specialized, pre-built, highly optimized software modules in the areas of VoIP and speech and audio codecs, and provide software optimization and customization services for (...)
From: Couth Infotech Pvt. Ltd.
Software codec

DSPI-3P-DSPVOIPCODECS — DSP Innovations: DSP VoIP codecs

DSP Innovations is a supplier of C5000TM DSP-software and engineering services. Proprietary and standard vocoders from DSPINI have superior characteristics, operate in range from 300 bps up to 64 kbps and are used in: secure voice, software defined radio, wireless, VoIP, voice storage, and more. (...)
From: DSP Innovations
Software codec

SCORP-3P-DSPAUDIOCODECS — Spirit DSP audio and speech codecs

Since inception in 1992 SPIRIT has become a global brand in top quality voice, audio and data communication software products and is well known for innovation. SPIRIT is a technology enabling company, leveraging its extensive experience in smart carrier-grade solutions for voice and video (...)
From: Spirit DSP
Software codec

VOCAL-3P-DSPVOIPCODECS — Vocal technologies DSP VoIP codecs

With over 25 years of assembly and C code development, VOCAL modular software suite is available for a wide variety of TI DSPs. Products include ATAs, VoIP servers and gateways, HPNA-based IPBXs, video surveillance, voice and video conferencing, voice and data RF devices, RoIP gateways, secure (...)
From: VOCAL Technologies, Ltd.
Simulation model

C5535 ZHH BSDL Model

SPRM553.ZIP (5 KB) - BSDL Model
Simulation model

C5535 ZHH IBIS Model

SPRM605.ZIP (1209 KB) - IBIS Model
Design tool

PROCESSORS-3P-SEARCH — Arm-based MPU, arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
Reference designs

TIDEP0066 — Speech Recognition Reference Design on the C5535 eZdsp™

The TIDEP0066 reference design highlights the voice recognition capabilities of the C5535 and C5545 DSP devices using the TI embedded speech recognition (TIesr) library and instructs how to run a voice triggering example that prints a pre-programmed keyword on the C5535eZdsp OLED screen, based on a (...)
Reference designs

TIDM-LPBP-TCHMP3PLAYER — MP3 Encoder/Decoder with capacitive touch interface, OLED display & SD card mass storage

The audio capacitive touch reference design is a plug-in board for the MSP430 LaunchPad development kit (MSP-EXP430G2). This reference design features several capacitive touch elements including a scroll wheel, button and proximity sensor and nine LEDs that provide instant feedback as users (...)
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Ordering & quality

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  • Ongoing reliability monitoring

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