The SMJ320C6203 device is part of the SMJ320C62x fixed-point DSP generation in the
SMJ320C6000 DSP platform. The C62x DSP devices are based on the high-performance, advanced VelociTI
VLIW architecture developed by TI, making these DSPs an excellent choice for multichannel and
The SMJ320C62x DSP offers cost-effective solutions to high-performance DSP-programming
challenges. The SMJ320C6203 has a performance capability of up to 1600 MIPS at a clock rate of 200
MHz. The C6203 DSP possesses the operational flexibility of high-speed controllers and the
numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit
word length and eight highly-independent functional units.
The eight functional units provide six ALUs for a high degree of parallelism and two
16-bit multipliers for a 32-bit result. The C6203 can produce two multiply-accumulates (MACs) per
cycle for a total of 400 million MACs per second (MMACS). The C6203 DSP also has
application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The C6203
device program memory consists of two blocks, with a 256KB block configured as memory-mapped
program space, and the other 128KB block user-configurable as cache or memory-mapped program space.
Data memory for the C6203 consists of two 256KB blocks of RAM.
The C6203 device has a powerful and diverse set of peripherals. The peripheral set
includes three McBSPs, two general-purpose timers, a 32-bit expansion bus that offers ease of
interface to synchronous or asynchronous industry-standard host bus protocols, and a glueless
32-bit EMIF capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.
The C62x devices have a complete set of development tools that includes: a new C
compiler, an assembly optimizer to simplify programming and scheduling, and a
Windows debugger interface
for visibility into source code execution.