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Product details

Parameters

Arm CPU DSP 1 C674x Operating system TI-RTOS Video port (configurable) 0 On-chip L2 cache/RAM 256 KB DRAM SDRAM PCI/PCIe Ethernet MAC 10/100 USB 1 SPI 2 I2C 2 UART (SCI) 3 Operating temperature range (C) -40 to 105, -40 to 125, -40 to 90, 0 to 90 Rating Catalog open-in-new Find other Audio & media processors

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HLQFP (PTP) 176 676 mm² 26 x 26 open-in-new Find other Audio & media processors

Features

  • Software Support
    • TI DSP/BIOS™
    • Chip Support Library and DSP Library
  • 375- and 456-MHz TMS320C674x VLIW DSP
  • C674x Instruction Set Features
    • Superset of the C67x+ and C64x+ ISAs
    • Up to 3648 MIPS and 2736 MFLOPS C674x
    • Byte-Addressable (8-, 16-, 32-, and 64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • Compact 16-Bit Instructions
  • C674x Two-Level Cache Memory Architecture
    • 32KB of L1P Program RAM/Cache
    • 32KB of L1D Data RAM/Cache
    • 256KB of L2 Unified Mapped RAM/Cache
    • Flexible RAM/Cache Partition (L1 and L2)
  • Enhanced Direct Memory Access Controller 3 (EDMA3):
    • 2 Transfer Controllers
    • 32 Independent DMA Channels
    • 8 Quick DMA Channels
    • Programmable Transfer Burst Size
  • TMS320C674x Fixed- and Floating-Point VLIW DSP Core
    • Load-Store Architecture with Nonaligned Support
    • 64 General-Purpose Registers (32-Bit)
    • Six ALU (32- and 40-Bit) Functional Units
      • Supports 32-Bit Integer, SP (IEEE Single Precision/32-Bit) and DP (IEEE Double Precision/64-Bit) Floating Point
      • Supports up to Four SP Additions Per Clock, Four DP Additions Every 2 Clocks
      • Supports up to Two Floating-Point (SP or DP) Reciprocal Approximation (RCPxP) and Square-Root Reciprocal Approximation (RSQRxP) Operations Per Cycle
    • Two Multiply Functional Units
      • Mixed-Precision IEEE Floating Point Multiply Supported up to:
        • 2 SP x SP -> SP Per Clock
        • 2 SP x SP -> DP Every Two Clocks
        • 2 SP x DP -> DP Every Three Clocks
        • 2 DP x DP -> DP Every Four Clocks
      • Fixed-Point Multiply Supports Two 32 x 32-Bit Multiplies, Four 16 x 16-Bit Multiplies, or Eight 8 x 8-Bit Multiplies per Clock Cycle, and Complex Multiples
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
    • Hardware Support for Modulo Loop
      Operation
    • Protected Mode Operation
    • Exceptions Support for Error Detection and Program Redirection
  • 128KB of RAM Shared Memory (TMS320C6747 Only)
  • 3.3-V LVCMOS I/Os (Except for USB Interfaces)
  • Two External Memory Interfaces:
    • EMIFA
      • NOR (8- or 16-Bit-Wide Data)
      • NAND (8- or 16-Bit-Wide Data)
      • 16-Bit SDRAM with 128-MB Address Space (TMS320C6747 Only)
    • EMIFB
      • 32-Bit or 16-Bit SDRAM with 256-MB Address Space (TMS320C6747)
      • 16-Bit SDRAM with 128-MB Address Space (TMS320C6745)
  • Three Configurable 16550-Type UART Modules:
    • UART0 with Modem Control Signals
    • Autoflow Control Signals (CTS, RTS) on UART0 Only
    • 16-Byte FIFO
    • 16x or 13x Oversampling Option
  • LCD Controller (TMS320C6747 Only)
  • Two Serial Peripheral Interfaces (SPIs) Each with One Chip Select
  • Multimedia Card (MMC)/Secure Digital (SD) Card Interface with Secure Data I/O (SDIO)
  • Two Master and Slave Inter-Integrated Circuit (I2C Bus™)
  • One Host-Port Interface (HPI) with 16-Bit-Wide Muxed Address/Data Bus for High Bandwidth (TMS320C6747 Only)
  • Programmable Real-Time Unit Subsystem (PRUSS)
    • Two Independent Programmable Realtime Unit (PRU) Cores
      • 32-Bit Load and Store RISC Architecture
      • 4KB of Instruction RAM per Core
      • 512 Bytes of Data RAM per Core
      • PRUSS can be Disabled via Software to Save Power
    • Standard Power-Management Mechanism
      • Clock Gating
      • Entire Subsystem Under a Single PSC Clock Gating Domain
    • Dedicated Interrupt Controller
    • Dedicated Switched Central Resource
  • USB 1.1 OHCI (Host) with Integrated PHY (USB1) (TMS320C6747 Only)
  • USB 2.0 OTG Port with Integrated PHY (USB0)
    • USB 2.0 High- and Full-Speed Client (TMS320C6747)
    • USB 2.0 Full-Speed Client (TMS320C6745)
    • USB 2.0 High-, Full-, and Low-Speed Host (TMS320C6747)
    • USB 2.0 Full- and Low-Speed Host (TMS320C6745)
    • High-Speed Functionality Available on TMS320C6747 Device Only
    • End Point 0 (Control)
    • End Points 1,2,3,4 (Control, Bulk, Interrupt or ISOC) RX and TX
  • Three Multichannel Audio Serial Ports (McASPs):
    • TMS320C6747 Supports 3 McASPs
    • TMS320C6745 Supports 2 McASPs
    • Six Clock Zones and 28 Serial Data Pins
    • Supports TDM, I2S, and Similar Formats
    • DIT-Capable (McASP2)
    • FIFO Buffers for Transmit and Receive
  • 10/100 Mbps Ethernet MAC (EMAC):
    • IEEE 802.3 Compliant (3.3-V I/O Only)
    • RMII Media-Independent Interface
    • Management Data I/O (MDIO) Module
  • Real-Time Clock with 32-kHz Oscillator and Separate Power Rail (TMS320C6747 Only)
  • One 64-Bit General-Purpose Timer (Configurable as Two 32-Bit Timers)
  • One 64-Bit General-Purpose Watchdog Timer (Configurable as Two 32-Bit General-Purpose Timers)
  • Three Enhanced Pulse Width Modulators (eHRPWMs):
    • Dedicated 16-Bit Time-Base Counter with Period and Frequency Control
    • 6 Single Edge, 6 Dual Edge Symmetric, or 3 Dual Edge Asymmetric Outputs
    • Dead-Band Generation
    • PWM Chopping by High-Frequency Carrier
    • Trip Zone Input
  • Three 32-Bit Enhanced Capture (eCAP) Modules:
    • Configurable as 3 Capture Inputs or 3 Auxiliary Pulse Width Modulator (APWM) Outputs
    • Single-Shot Capture of up to Four Event Time-Stamps
  • Two 32-Bit Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • TMS320C6747 Device:
    • 256-Ball Pb-Free Plastic Ball Grid Array (PBGA) [ZKB Suffix], 1.0-mm Ball Pitch
  • TMS320C6745 Device:
    • 176-pin PowerPAD™ Plastic Quad Flat Pack [PTP suffix], 0.5-mm Pin Pitch
  • Commercial, Industrial, Extended, or Automotive Temperature

All trademarks are the property of their respective owners.

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Description

The TMS320C6745/6747 device is a low-power digital signal processor based on a TMS320C674x DSP core. It consumes significantly lower power than other members of the TMS320C6000™ platform of DSPs.

The TMS320C6745/6747 device enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices featuring high processing performance .

The TMS320C6745/6747 DSP core uses a two-level cache-based architecture. The Level 1 program cache (L1P) is a 32-KB direct mapped cache and the Level 1 data cache (L1D) is a 32-KB 2-way set-associative cache. The Level 2 program cache (L2P) consists of a 256-KB memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. Although the DSP L2 is accessible by other hosts in the system, an additional 128KB of RAM shared memory (TMS320C6747 only) is available for use by other hosts without affecting DSP performance.

The peripheral set includes: a 10/100 Mbps Ethernet MAC (EMAC) with a management data input/output (MDIO) module; two I2C Bus interfaces; 3 multichannel audio serial ports (McASPs) with 16/9 serializers and FIFO buffers; two 64-bit general-purpose timers each configurable (one configurable as watchdog); a configurable 16-bit host-port interface (HPI) [TMS320C6747 only]; up to 8 banks of 16 pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; 3 UART interfaces (one with both RTS and CTS); three enhanced high-resolution pulse width modulator (eHRPWM) peripherals; three 32-bit enhanced capture (eCAP) module peripherals which can be configured as 3 capture inputs or 3 auxiliary pulse width modulator (APWM) outputs; two 32-bit enhanced quadrature encoded pulse (eQEP) peripherals; and 2 external memory interfaces: an asynchronous and SDRAM external memory interface (EMIFA) for slower memories or peripherals, and a higher speed memory interface (EMIFB) for SDRAM.

The Ethernet Media Access Controller (EMAC) provides an efficient interface between the TMS320C6745/6747 device and the network. The EMAC supports both 10Base-T and 100Base-TX, or 10 Mbps and 100 Mbps in either half- or full-duplex mode. Additionally, an MDIO interface is available for PHY configuration.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet TMS320C6745, TMS320C6747 Fixed- and Floating-Point Digital Signal Processor datasheet (Rev. F) Jun. 17, 2014
* Errata TMS320C6745 Fixed/Floating-Point DSP SE (Silicon Revs 3.0, 2.1, 2.0, 1.1, & 1.0) (Rev. G) Jun. 17, 2014
* User guides TMS320C6745/C6747 DSP Technical Reference Manual (Rev. D) Sep. 21, 2016
User guides SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) Jun. 01, 2020
Application notes How to Migrate CCS 3.x Projects to the Latest CCS Feb. 06, 2020
Application notes Using DSPLIB FFT Implementation for Real Input and Without Data Scaling Jun. 11, 2019
Application notes Programming PLL Controllers on OMAP-L1x8/C674x/AM18xx Apr. 25, 2019
Application notes TMS320C6747/45/43 Power Consumption Summary Apr. 23, 2019
Application notes General Hardware Design/BGA PCB Design/BGA Feb. 22, 2019
Application notes OMAP-L13x / C674x / AM1x schematic review guidelines Feb. 14, 2019
Application notes McASP Design Guide - Tips, Tricks, and Practical Examples Jan. 10, 2019
Application notes High-Speed Interface Layout Guidelines (Rev. H) Oct. 11, 2018
White papers Designing professional audio mixers for every scenario Jun. 28, 2018
User guides SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. U) Feb. 07, 2018
User guides OMAP-L137 C6000 DSP+ARM Processor Technical Reference Manual (Rev. D) Sep. 21, 2016
User guides System Analyzer User's Guide (Rev. F) Nov. 18, 2013
User guides TMS320C6000 Assembly Language Tools v 7.4 User's Guide (Rev. W) Aug. 21, 2012
User guides TMS320C6000 Optimizing Compiler v 7.4 User's Guide (Rev. U) Aug. 21, 2012
Application notes Using the OMAP-L1x7 Bootloader (Rev. G) Jun. 01, 2012
Application notes Using the TMS320C6747/45/43 Bootloader (Rev. C) Jun. 01, 2012
Application notes Introduction to TMS320C6000 DSP Optimization Oct. 06, 2011
User guides TMS320C674x/OMAP-L1x Processor Peripherals Overview Reference Guide (Rev. F) Sep. 14, 2011
White papers Software and Hardware Design Challenges Due to Dynamic Raw NAND Market May 19, 2011
Application notes Power Solution Using Discrete DC/DC Converters and LDOs (Rev. B) Aug. 26, 2010
User guides TMS320C674x DSP Megamodule Reference Guide (Rev. A) Aug. 03, 2010
User guides TMS320C674x DSP CPU and Instruction Set User's Guide (Rev. B) Jul. 30, 2010
Application notes Power Solution using LDO's (Rev. A) Mar. 25, 2010
Application notes Power Solution using a Dual DCDC Converter and a LDO (Rev. A) Mar. 25, 2010
User guides TMS320C6000 Assembly Language Tools v 7.0 User's Guide (Rev. S) Mar. 18, 2010
User guides TMS320C6000 Optimizing Compiler v 7.0 User's Guide (Rev. Q) Mar. 18, 2010
Application notes OMAP-L137 TMS320C6747/6745/6743 Pin Multiplexing Utility (Rev. A) Sep. 26, 2009
Application notes TMS320C6747/45/43 Complementary Products Sep. 23, 2009
White papers Efficient Fixed- and Floating-Point Code Execution on the TMS320C674x Core Jun. 24, 2009
Application notes TMS320C6747/45/43 & OMAP-L1x7 USB Downstream Host Compliance Testing Mar. 12, 2009
Application notes TMS320C6747/45/43 & OMAP-L1x7 USB Upstream Device Compliance Testing Mar. 12, 2009
Application notes TMS320C674x/OMAP-L1x USB Compliance Checklist Mar. 12, 2009
Application notes TMS320C6745 Technical Brief (Rev. B) Feb. 18, 2009
User guides TMS320C674x DSP Cache User's Guide (Rev. A) Feb. 11, 2009
User guides TMS320C6000 Assembly Language Tools v 6.1 User's Guide (Rev. Q) May 15, 2008
User guides TMS320C6000 Optimizing Compiler v 6.1 User's Guide (Rev. O) May 15, 2008
User guides TMS320C6000 Assembly Language Tools v 6.0 Beta User's Guide (Rev. P) Oct. 31, 2006
User guides TMS320C6000 Optimizing Compiler v 6.0 Beta User's Guide (Rev. N) Jul. 29, 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
525
Description

The OMAP-L137/TMS320C6747 Floating-Point Starter Kit, developed jointly with Spectrum Digital Inc., is a low-cost development platform designed to speed the development of high-precision applications based on TI's OMAP-L13x applications processors and TMS320C674x fixed-/floating-point DSPs (...)

Features

Hardware - The Starter Kit (SK) features the OMAP-L137 applications processor that includes both a 300 MHz fixed/floating-point C674x DSP core and a 300 MHz ARM9 processor. This C674x DSP generation is designed for applications that require floating-point precision and fixed-point performance for (...)

Software development

SOFTWARE DEVELOPMENT KITS (SDK) Download
Processor SDK for C6747 Processors TI-RTOS Support
PROCESSOR-SDK-C6747 Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)
Features

RTOS Features:

  • Full driver availability
  • Debug and instrumentation utilities
  • Board support package
  • Demonstrations and examples
  • Code Composer Studio™ IDE for RTOS development
  • Documentation

The Processor SDK is free, and does not require any run-time royalties to Texas Instruments.

DEBUG PROBES Download
XDS200 USB Debug Probe
TMDSEMU200-U The Spectrum Digital XDS200 is the first model of the XDS200 family of debug probes (emulators) for TI processors. The XDS200 family features a balance of low cost with good performance between the super low cost XDS110 and the high performance XDS560v2, while supporting a wide variety of standards (...)
295
Features

The XDS200 is the mid-range family of JTAG debug probes (emulators) for TI processors. Designed to deliver good performance and the most common features that place it between the low cost XDS110 and the high performance XDS560v2, the XDS200 is the balanced solution to debug TI microcontrollers (...)

DEBUG PROBES Download
XDS560v2 System Trace USB Debug Probe
TMDSEMU560V2STM-U The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

995
Features

XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DEBUG PROBES Download
XDS560v2 System Trace USB & Ethernet Debug Probe
TMDSEMU560V2STM-UE The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

1495
Features
  • XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DRIVERS & LIBRARIES Download
DSP Math Library for Floating Point Devices
MATHLIB — The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
Features
  • Types of functions included:
    • Trigonometric and hyperbolic: Sin, Cos, Tan, Arctan, etc.
    • Power, exponential, and logarithmic
    • Reciprocal
    • Square root
    • Division
  • Natural C Source Code
  • Optimized C code with Intrinsics
  • Hand-coded assembly-optimized routines
  • C-callable routines, which can be inlined and are fully (...)
DRIVERS & LIBRARIES Download
TMS320C5000/6000 Image Library (IMGLIB)
SPRC264 C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Features

Image Analysis

  • Image boundry and perimeter
  • Morphological operation
  • Edge detection
  • Image Histogram
  • Image thresholding

Image filtering and format conversion

  • Color space conversion
  • Image convolution
  • Image correlation
  • Error diffusion
  • Median filtering
  • Pixel expansion

Image compression and decompression

  • Forward and (...)
DRIVERS & LIBRARIES Download
TMS320C6000 DSP Library (DSPLIB)
SPRC265 TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Features

Optimized DSP routines including functions for:

  • Adaptive filtering
  • Correlation
  • FFT
  • Filtering and convolution: FIR, biquad, IIR, convolution
  • Math: Dot products, max value, min value, etc.
  • Matrix operations
DRIVERS & LIBRARIES Download
Telecom and Media Libraries - FAXLIB, VoLIB and AEC/AER for TMS320C64x+ and TMS320C55x Processors
TELECOMLIB Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be acquired (...)
Features

VoLIB

  • Telogy Software Line Echo Canceller (ECU)
  • Tone Detection Unit (TDU)
  • Caller ID Detection/Generation (CID)
  • Tone Generation Unit (TGU)
  • Voice Activity Detection Unit (VAU)
  • Noise Matching Functions
  • Packet Loss Concealment (PLC)
  • Voice Enhancement Unit (VEU)  

FAXLIB

  • Fax Interface Unit (FIU)
  • Fax Modem (FM)
  • (...)
IDES, CONFIGURATION, COMPILERS & DEBUGGERS Download
Code Composer Studio (CCS) Integrated Development Environment (IDE)
CCSTUDIO

Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor (...)

SOFTWARE CODECS Download
Adaptive Digital Technologies DSP VOIP, speech and audio codecs
Provided by Adaptive Digital Technologies, Inc. — Adaptive Digital is a developer of voice quality enhancement algorithms, and best-in-class acoustic echo cancellation software that work with TI DSPs. Adaptive Digital has extensive experience in the algorithm development, implementation, optimization and configuration tuning. They provide solutions (...)
SOFTWARE CODECS Download
Vocal technologies DSP VoIP codecs
Provided by VOCAL Technologies, Ltd. — With over 25 years of assembly and C code development, VOCAL modular software suite is available for a wide variety of TI DSPs. Products include ATAs, VoIP servers and gateways, HPNA-based IPBXs, video surveillance, voice and video conferencing, voice and data RF devices, RoIP gateways, secure (...)

Design tools & simulation

SIMULATION MODELS Download
SPRM327C.ZIP (16 KB) - BSDL Model
SIMULATION MODELS Download
SPRM389B.ZIP (109 KB) - IBIS Model
SCHEMATICS Download
SPRR126A.ZIP (54 KB)
SCHEMATICS Download
SPRR127.ZIP (5 KB)

Reference designs

REFERENCE DESIGNS Download
Powering the TMS320C6745 and TMS320C6747 with the TPS650061
PR2048 — Low cost integrated power solution for TI - C6745/6747 processors
Design files

CAD/CAE symbols

Package Pins Download
HLQFP (PTP) 176 View options

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