TMS320DM6441

ACTIVE

Product details

DSP 1 C64x DSP MHz (Max) 405, 513 CPU 32-/64-bit Operating system DSP/BIOS, Integrity, Linux, Neutrino, PrOS, Windows Embedded CE Ethernet MAC 10/100 Rating Catalog
DSP 1 C64x DSP MHz (Max) 405, 513 CPU 32-/64-bit Operating system DSP/BIOS, Integrity, Linux, Neutrino, PrOS, Windows Embedded CE Ethernet MAC 10/100 Rating Catalog
NFBGA (ZWT) 361 256 mm² 16 x 16
  • Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. REQUEST FREE SOFTWARE!
  • High-Performance Digital Media SoC
    • C64x+™ DSP Clock Rate
      • 405-MHz (Max) at 1.05 V or 513-MHz (Max) at 1.2 V
    • ARM926EJ-S™ Clock Rate
      • 202.5-MHz (Max) at 1.05 V or 256-MHz (Max) at 1.2 V
    • Eight 32-Bit C64x+ Instructions/Cycle
    • 4752 C64x+ MIPS
    • Fully Software-Compatible With C64x &153; ARM9™
  • Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core
    • Eight Highly Independent Functional Units
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 × 8-Bit Multiplies (16-Bit Results) per Clock Cycle
    • Load-Store Architecture With Non-Aligned Support
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
    • Additional C64x+™ Enhancements
      • Protected Mode Operation
      • Exceptions Support for Error Detection and Program Redirection
      • Hardware Support for Modulo Loop Operation
  • C64x+ Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • Compact 16-Bit Instructions
    • Additional Instructions to Support Complex Multiplies
  • C64x+ L1/L2 Memory Architecture
    • 32K-Byte L1P Program RAM/Cache (Direct Mapped)
    • 80K-Byte L1D Data RAM/Cache (2-Way Set-Associative)
    • 64K-Byte L2 Unified Mapped RAM/Cache (Flexible RAM/Cache Allocation)
  • ARM926EJ-S Core
    • Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
    • DSP Instruction Extensions and Single Cycle MAC
    • ARM® Jazelle® Technology
    • Embedded ICE-RT™ Logic for Real-Time Debug
  • ARM9 Memory Architecture
    • 16K-Byte Instruction Cache
    • 8K-Byte Data Cache
    • 16K-Byte RAM
    • 8K-Byte ROM
  • Embedded Trace Buffer™ (ETB11™) With 4KB Memory for ARM9 Debug
  • Endianness: Little Endian for ARM and DSP
  • Video Imaging Co-Processor (VICP)
  • Video Processing Subsystem
    • Front End Provides:
      • CCD and CMOS Imager Interface
      • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
      • Preview Engine for Real-Time Image Processing
      • Glueless Interface to Common Video Decoders
      • Histogram Module
      • Auto-Exposure, Auto-White Balance, and Auto-Focus Module
      • Resize Engine
        • Resize Images From 1/4× to 4×
        • Separate Horizontal/Vertical Control
    • Back End Provides:
      • Hardware On-Screen Display (OSD)
      • Four 54-MHz DACs for a Combination of
        • Composite NTSC/PAL Video
        • Luma/Chroma Separate Video (S-video)
        • Component (YPbPr or RGB) Video (Progressive)
      • Digital Output
        • 8-/16-bit YUV or up to 24-Bit RGB
        • HD Resolution
        • Up to Two Video Windows
  • External Memory Interfaces (EMIFs)
    • 32-Bit DDR2 SDRAM Memory Controller With 256M-Byte Address Space (1.8-V I/O)
    • Asynchronous16-Bit Wide EMIF (EMIFA) With 128M-Byte Address Reach
      • Flash Memory Interfaces
        • NOR (8-/16-Bit-Wide Data)
        • NAND (8-/16-Bit-Wide Data)
  • Flash Card Interfaces
    • Multimedia Card (MMC)/Secure Digital (SD) with Secure Data I/O (SDIO)
    • CompactFlash Controller With True IDE Mode
    • SmartMedia
    • Memory Stick® and Memory Stick Pro™
  • Enhanced Direct-Memory-Access (EDMA3) Controller (64 Independent Channels)
  • Two 64-Bit General-Purpose Timers (Each Configurable as Two 32-Bit Timers)
  • One 64-Bit Watch Dog Timer
  • Three UARTs (One with RTS and CTS Flow Control)
  • One Serial Port Interface (SPI) With Two Chip-Selects
  • Master/Slave Inter-Integrated Circuit (I2C Bus™)
  • Audio Serial Port (ASP)
    • I2S
    • AC97 Audio Codec Interface
    • Standard Voice Codec Interface (AIC12)
  • 10/100 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Media Independent Interface (MII)
  • VLYNQ™ Interface (FPGA Interface)
  • Host Port Interface (HPI) with 16-Bit Multiplexed Address/Data
  • USB Port With Integrated 2.0 PHY
    • USB 2.0 High-/Full-Speed Client
    • USB 2.0 High-/Full-/Low-Speed Host
  • Three Pulse Width Modulator (PWM) Outputs
  • Macrovision® Anticopy Protection (TMS320DM6442 only)(1)
  • On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash or UART
  • ATA/ATAPI I/F (ATA/ATAPI-5 Specification)
  • Individual Power-Saving Modes for ARM/DSP
  • Flexible PLL Clock Generators
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • Up to 71 General-Purpose I/O (GPIO) Pins (Multiplexed With Other Device Functions)
  • 361-Pin Pb-Free BGA Package (ZWT Suffix), 0.8-mm Ball Pitch
  • 0.09-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V and 1.8-V I/O, 1.05-V or 1.2-V internal
  • Applications:
    • Digital Media
    • Networked Media Encode/Decode
    • Video Imaging
    • Portable Media Players

(1) This device is protected by U.S. patent numbers 4,631,603; 4,819,098; 5,315,448; and 6,516,132, and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view uses only, unless otherwise authorized in writing by Macrovision. Reverse engineering or disassembly is prohibited.

All trademarks are the property of their respective owners.

  • Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. REQUEST FREE SOFTWARE!
  • High-Performance Digital Media SoC
    • C64x+™ DSP Clock Rate
      • 405-MHz (Max) at 1.05 V or 513-MHz (Max) at 1.2 V
    • ARM926EJ-S™ Clock Rate
      • 202.5-MHz (Max) at 1.05 V or 256-MHz (Max) at 1.2 V
    • Eight 32-Bit C64x+ Instructions/Cycle
    • 4752 C64x+ MIPS
    • Fully Software-Compatible With C64x &153; ARM9™
  • Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core
    • Eight Highly Independent Functional Units
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 × 8-Bit Multiplies (16-Bit Results) per Clock Cycle
    • Load-Store Architecture With Non-Aligned Support
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
    • Additional C64x+™ Enhancements
      • Protected Mode Operation
      • Exceptions Support for Error Detection and Program Redirection
      • Hardware Support for Modulo Loop Operation
  • C64x+ Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • Compact 16-Bit Instructions
    • Additional Instructions to Support Complex Multiplies
  • C64x+ L1/L2 Memory Architecture
    • 32K-Byte L1P Program RAM/Cache (Direct Mapped)
    • 80K-Byte L1D Data RAM/Cache (2-Way Set-Associative)
    • 64K-Byte L2 Unified Mapped RAM/Cache (Flexible RAM/Cache Allocation)
  • ARM926EJ-S Core
    • Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
    • DSP Instruction Extensions and Single Cycle MAC
    • ARM® Jazelle® Technology
    • Embedded ICE-RT™ Logic for Real-Time Debug
  • ARM9 Memory Architecture
    • 16K-Byte Instruction Cache
    • 8K-Byte Data Cache
    • 16K-Byte RAM
    • 8K-Byte ROM
  • Embedded Trace Buffer™ (ETB11™) With 4KB Memory for ARM9 Debug
  • Endianness: Little Endian for ARM and DSP
  • Video Imaging Co-Processor (VICP)
  • Video Processing Subsystem
    • Front End Provides:
      • CCD and CMOS Imager Interface
      • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
      • Preview Engine for Real-Time Image Processing
      • Glueless Interface to Common Video Decoders
      • Histogram Module
      • Auto-Exposure, Auto-White Balance, and Auto-Focus Module
      • Resize Engine
        • Resize Images From 1/4× to 4×
        • Separate Horizontal/Vertical Control
    • Back End Provides:
      • Hardware On-Screen Display (OSD)
      • Four 54-MHz DACs for a Combination of
        • Composite NTSC/PAL Video
        • Luma/Chroma Separate Video (S-video)
        • Component (YPbPr or RGB) Video (Progressive)
      • Digital Output
        • 8-/16-bit YUV or up to 24-Bit RGB
        • HD Resolution
        • Up to Two Video Windows
  • External Memory Interfaces (EMIFs)
    • 32-Bit DDR2 SDRAM Memory Controller With 256M-Byte Address Space (1.8-V I/O)
    • Asynchronous16-Bit Wide EMIF (EMIFA) With 128M-Byte Address Reach
      • Flash Memory Interfaces
        • NOR (8-/16-Bit-Wide Data)
        • NAND (8-/16-Bit-Wide Data)
  • Flash Card Interfaces
    • Multimedia Card (MMC)/Secure Digital (SD) with Secure Data I/O (SDIO)
    • CompactFlash Controller With True IDE Mode
    • SmartMedia
    • Memory Stick® and Memory Stick Pro™
  • Enhanced Direct-Memory-Access (EDMA3) Controller (64 Independent Channels)
  • Two 64-Bit General-Purpose Timers (Each Configurable as Two 32-Bit Timers)
  • One 64-Bit Watch Dog Timer
  • Three UARTs (One with RTS and CTS Flow Control)
  • One Serial Port Interface (SPI) With Two Chip-Selects
  • Master/Slave Inter-Integrated Circuit (I2C Bus™)
  • Audio Serial Port (ASP)
    • I2S
    • AC97 Audio Codec Interface
    • Standard Voice Codec Interface (AIC12)
  • 10/100 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Media Independent Interface (MII)
  • VLYNQ™ Interface (FPGA Interface)
  • Host Port Interface (HPI) with 16-Bit Multiplexed Address/Data
  • USB Port With Integrated 2.0 PHY
    • USB 2.0 High-/Full-Speed Client
    • USB 2.0 High-/Full-/Low-Speed Host
  • Three Pulse Width Modulator (PWM) Outputs
  • Macrovision® Anticopy Protection (TMS320DM6442 only)(1)
  • On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash or UART
  • ATA/ATAPI I/F (ATA/ATAPI-5 Specification)
  • Individual Power-Saving Modes for ARM/DSP
  • Flexible PLL Clock Generators
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • Up to 71 General-Purpose I/O (GPIO) Pins (Multiplexed With Other Device Functions)
  • 361-Pin Pb-Free BGA Package (ZWT Suffix), 0.8-mm Ball Pitch
  • 0.09-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V and 1.8-V I/O, 1.05-V or 1.2-V internal
  • Applications:
    • Digital Media
    • Networked Media Encode/Decode
    • Video Imaging
    • Portable Media Players

(1) This device is protected by U.S. patent numbers 4,631,603; 4,819,098; 5,315,448; and 6,516,132, and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view uses only, unless otherwise authorized in writing by Macrovision. Reverse engineering or disassembly is prohibited.

All trademarks are the property of their respective owners.

The TMS320DM6441 (also referenced as DM6441) leverages TI's DaVinci™ technology to meet the networked media encode and decode application processing needs of next-generation embedded devices.

The DM6441 enables OEMs and ODMs to quickly bring to market devices featuring robust operating systems support, rich user interfaces, high processing performance, and long battery life through the maximum flexibility of a fully integrated mixed processor solution.

The dual-core architecture of the DM6441 provides benefits of both DSP and Reduced Instruction Set Computer (RISC) technologies, incorporating a high-performance TMS320C64x+ DSP core and an ARM926EJ-S core.

The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-bit, 16-bit, or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.

The ARM core incorporates:

  • A coprocessor 15 (CP15) and protection module
  • Data and program memory management units (MMUs) with table look-aside buffers.
  • Separate 16K-byte instruction and 8K-byte data caches. Both are four-way associative with virtual index virtual tag (VIVT).

The TMS320C64x+™ DSPs are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. It is based on an enhanced version of the second-generation high-performance, advanced very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSP cores an excellent choice for digital media applications. The C64x is a code-compatible member of the C6000™ DSP platform. The TMS320C64x+ DSP is an enhancement of the C64x+ DSP with added functionality and an expanded instruction set.

Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.

With performance of up to 4104 million instructions per second (MIPS) at a clock rate of 513 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units&151;two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in video and imaging applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2052 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4104 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).

The DM6441 also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000 DSP platform devices. The DM6441 core uses a two-level cache-based architecture. The Level 1 program cache (L1P) is a 256K-bit direct mapped cache and the Level 1 data cache (L1D) is a 640K-bit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of an 512K-bit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two.

The peripheral set includes: two configurable video ports; a 10/100 Mb/s Ethernet MAC (EMAC) with a management data input/output (MDIO) module; an inter-integrated circuit (I2C) bus interface; one audio serial port (ASP); two 64-bit general-purpose timers each configurable as two independent 32-bit timers; one 64-bit watchdog timer; up to 71 pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; three UARTs with hardware handshaking support on one UART; three pulse width modulator (PWM) peripherals; and two external memory interfaces: an asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher speed synchronous memory interface for DDR2.

The DM6441 device includes a video processing subsystem (VPSS) with two configurable video/imaging peripherals: one video processing front-end (VPFE) input used for video capture, one video processing back-end (VPBE) output with imaging coprocessor (VICP) used for display.

The video processing front-end (VPFE) consists of a CCD controller (CCDC), a preview engine (previewer), histogram module, auto-exposure/white balance/focus module (H3A), and resizer. The CCDC is capable of interfacing to common video decoders, CMOS sensors, and charge coupled devices (CCDs). The previewer is a real-time image processing engine that takes raw imager data from a CMOS sensor or CCD and converts from an RGB Bayer pattern to YUV4:2:2. The histogram and H3A modules provide statistical information on the raw color data for use by the DM6441. The resizer accepts image data for separate horizontal and vertical resizing from 1/4x to 4x in increments of 256/N, where N is between 64 and 1024.

The video processing back-end (VPBE) consists of an on-screen display engine (OSD) and a video encoder (VENC). The OSD engine is capable of handling two separate video windows and two separate OSD windows. Other configurations include two video windows, one OSD window, and one attribute window allowing up to eight levels of alpha blending. The VENC provides four analog DACs that run at 54 MHz, providing a means for composite NTSC/PAL video, S-Video, and/or component video output. The VENC also provides up to 24 bits of digital output to interface to RGB888 devices. The digital output is capable of 8/16-bit BT.656 output and/or CCIR.601 with separate horizontal and vertical syncs. VFocus (part of the VPBE functionality and operationally (e.g., 16-bit multiplexed address/data) is also provided.

The Ethernet media access controller (EMAC) provides an efficient interface between the DM6441 and the network. The DM6441 EMAC support both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps in either half- or full-duplex mode, with hardware flow control and quality of service (QOS) support.

The management data input/output (MDIO) module continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system. Once a PHY candidate has been selected by the ARM, the MDIO module transparently monitors its link state by reading the PHY status register. Link change events are stored in the MDIO module and can optionally interrupt the ARM, allowing the ARM to poll the link status of the device without continuously performing costly MDIO accesses.

The HPI, I2C, SPI, USB2.0, and VLYNQ ports allow DM6441 to easily control peripheral devices and/or communicate with host processors. The DM6441 also provides Memory Stick/Memory Stick Pro card support, MMC/SD with SDIO support, and a universal serial bus (USB).

The DM6441 also includes a video/imaging coprocessor (VICP) to offload many video and imaging processing tasks from the DSP core, making more DSP MIPS available for common video and imaging algorithms. For more information on the VICP enhanced codecs, such as H.264 and MPEG4, please contact your nearest TI sales representative.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.

The DM6441 has a complete set of development tools for both the ARM and DSP. These include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code

The TMS320DM6441 (also referenced as DM6441) leverages TI's DaVinci™ technology to meet the networked media encode and decode application processing needs of next-generation embedded devices.

The DM6441 enables OEMs and ODMs to quickly bring to market devices featuring robust operating systems support, rich user interfaces, high processing performance, and long battery life through the maximum flexibility of a fully integrated mixed processor solution.

The dual-core architecture of the DM6441 provides benefits of both DSP and Reduced Instruction Set Computer (RISC) technologies, incorporating a high-performance TMS320C64x+ DSP core and an ARM926EJ-S core.

The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-bit, 16-bit, or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.

The ARM core incorporates:

  • A coprocessor 15 (CP15) and protection module
  • Data and program memory management units (MMUs) with table look-aside buffers.
  • Separate 16K-byte instruction and 8K-byte data caches. Both are four-way associative with virtual index virtual tag (VIVT).

The TMS320C64x+™ DSPs are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. It is based on an enhanced version of the second-generation high-performance, advanced very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSP cores an excellent choice for digital media applications. The C64x is a code-compatible member of the C6000™ DSP platform. The TMS320C64x+ DSP is an enhancement of the C64x+ DSP with added functionality and an expanded instruction set.

Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.

With performance of up to 4104 million instructions per second (MIPS) at a clock rate of 513 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units&151;two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in video and imaging applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2052 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4104 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).

The DM6441 also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000 DSP platform devices. The DM6441 core uses a two-level cache-based architecture. The Level 1 program cache (L1P) is a 256K-bit direct mapped cache and the Level 1 data cache (L1D) is a 640K-bit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of an 512K-bit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two.

The peripheral set includes: two configurable video ports; a 10/100 Mb/s Ethernet MAC (EMAC) with a management data input/output (MDIO) module; an inter-integrated circuit (I2C) bus interface; one audio serial port (ASP); two 64-bit general-purpose timers each configurable as two independent 32-bit timers; one 64-bit watchdog timer; up to 71 pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; three UARTs with hardware handshaking support on one UART; three pulse width modulator (PWM) peripherals; and two external memory interfaces: an asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher speed synchronous memory interface for DDR2.

The DM6441 device includes a video processing subsystem (VPSS) with two configurable video/imaging peripherals: one video processing front-end (VPFE) input used for video capture, one video processing back-end (VPBE) output with imaging coprocessor (VICP) used for display.

The video processing front-end (VPFE) consists of a CCD controller (CCDC), a preview engine (previewer), histogram module, auto-exposure/white balance/focus module (H3A), and resizer. The CCDC is capable of interfacing to common video decoders, CMOS sensors, and charge coupled devices (CCDs). The previewer is a real-time image processing engine that takes raw imager data from a CMOS sensor or CCD and converts from an RGB Bayer pattern to YUV4:2:2. The histogram and H3A modules provide statistical information on the raw color data for use by the DM6441. The resizer accepts image data for separate horizontal and vertical resizing from 1/4x to 4x in increments of 256/N, where N is between 64 and 1024.

The video processing back-end (VPBE) consists of an on-screen display engine (OSD) and a video encoder (VENC). The OSD engine is capable of handling two separate video windows and two separate OSD windows. Other configurations include two video windows, one OSD window, and one attribute window allowing up to eight levels of alpha blending. The VENC provides four analog DACs that run at 54 MHz, providing a means for composite NTSC/PAL video, S-Video, and/or component video output. The VENC also provides up to 24 bits of digital output to interface to RGB888 devices. The digital output is capable of 8/16-bit BT.656 output and/or CCIR.601 with separate horizontal and vertical syncs. VFocus (part of the VPBE functionality and operationally (e.g., 16-bit multiplexed address/data) is also provided.

The Ethernet media access controller (EMAC) provides an efficient interface between the DM6441 and the network. The DM6441 EMAC support both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps in either half- or full-duplex mode, with hardware flow control and quality of service (QOS) support.

The management data input/output (MDIO) module continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system. Once a PHY candidate has been selected by the ARM, the MDIO module transparently monitors its link state by reading the PHY status register. Link change events are stored in the MDIO module and can optionally interrupt the ARM, allowing the ARM to poll the link status of the device without continuously performing costly MDIO accesses.

The HPI, I2C, SPI, USB2.0, and VLYNQ ports allow DM6441 to easily control peripheral devices and/or communicate with host processors. The DM6441 also provides Memory Stick/Memory Stick Pro card support, MMC/SD with SDIO support, and a universal serial bus (USB).

The DM6441 also includes a video/imaging coprocessor (VICP) to offload many video and imaging processing tasks from the DSP core, making more DSP MIPS available for common video and imaging algorithms. For more information on the VICP enhanced codecs, such as H.264 and MPEG4, please contact your nearest TI sales representative.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.

The DM6441 has a complete set of development tools for both the ARM and DSP. These include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code

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Limited design support from TI available

This product has limited design support from TI for existing projects. If available, you will find relevant collateral, software and tools in the product folder. For existing designs using this product, you can request support in the TI E2ETM support forums, but limited support is available for this product.

Technical documentation

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Type Title Date
* Data sheet TMS320DM6441 Digital Media System-on-Chip datasheet (Rev. E) 30 Aug 2010
* Errata TMS320DM6441 Digital Media SoC Silicon Errata (Revs 2.3, 2.1, 1.3,1.2,1.1) (Rev. J) 12 Aug 2010
Application note High-Speed Interface Layout Guidelines (Rev. I) PDF | HTML 14 Apr 2022
Technical article Difficult to see. Always in motion is the future 04 Jan 2016
Technical article Announcing the new entry-level Sitara processor 09 Dec 2015
Technical article Automotive Surround View Technology trends 31 Aug 2015
Technical article Solar Inverter Gateways Made Simple with AM335x 28 Jul 2015
User guide TMS320C6000 Assembly Language Tools v 7.4 User's Guide (Rev. W) 21 Aug 2012
User guide TMS320C6000 Optimizing Compiler v 7.4 User's Guide (Rev. U) 21 Aug 2012
Application note Introduction to TMS320C6000 DSP Optimization 06 Oct 2011
User guide TMS320DM644x DMSoC 64-bit Timer User's Guide 01 Aug 2011
User guide TMS320C6000 Programmer's Guide (Rev. K) 11 Jul 2011
User guide TMS320DM644x DMSoC Inter-Integrated Circuit (I2C) Peripheral User's Guide (Rev. F) 25 Mar 2011
User guide TMS320DM644x DMSoC Video Processing Back End (VPBE) User's Guide (Rev. D) 27 Jan 2011
User guide TMS320DM644x DMSoC DDR2 Memory Controller User's Guide (Rev. E) 12 Jan 2011
User guide TMS320DM644x DMSoC EMAC/MDIO Module User's Guide (Rev. B) 23 Dec 2010
User guide TMS320DM644x DMSoC Video Processing Front End (VPFE) User's Guide (Rev. H) 25 Aug 2010
User guide TMS320DM644x DMSoC General-Purpose Input/Output (GPIO) User's Guide (Rev. A) 19 Aug 2010
Application note TMS320DM6446/3 Power Consumption Summary (Rev. B) 16 Aug 2010
User guide TMS320DM644x DMSoC Pulse-Width Modulator (PWM) User's Guide (Rev. A) 06 Aug 2010
User guide TMS320C64x+ DSP Megamodule Reference Guide (Rev. K) 03 Aug 2010
User guide TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (Rev. J) 30 Jul 2010
User guide TMS320DM644x DMSoC ARM Subsystem Reference Guide (Rev. C) 21 Jul 2010
Application note Migrating From TMS320DM644x v.2.1 ROM Bootloader to 2.3 Version 20 Jul 2010
User guide TMS320DM644x DMSoC Universal Serial Bus (USB) Controller User's Guide (Rev. G) 02 Jun 2010
User guide TMS320C6000 Assembly Language Tools v 7.0 User's Guide (Rev. S) 18 Mar 2010
User guide TMS320C6000 Optimizing Compiler v 7.0 User's Guide (Rev. Q) 18 Mar 2010
Application note USB Compliance Checklist (Rev. A) 10 Mar 2010
Application note Booting and Flashing via the DaVinci TMS320DM644x Serial Interface (Rev. A) 10 Sep 2009
Application note LSP 2.10 DaVinci Linux Drivers (Rev. A) 08 Jul 2009
Application note Common Object File Format (COFF) 15 Apr 2009
User guide TMS320DM644x DMSoC Asynchronous External Memory Interface (EMIF) User's Guide (Rev. C) 24 Feb 2009
User guide TMS320DM644x DMSoC Host Port Interface (HPI) User's Guide (Rev. B) 22 Feb 2009
User guide TMS320C64x+ DSP Cache User's Guide (Rev. B) 11 Feb 2009
Application note De-Interlacing and YUV 4:2:2 to 4:2:0 Conversion on DM6446 Using the Resizer (Rev. B) 17 Dec 2008
Application note Booting DaVinci EVM from NAND Flash (Rev. A) 15 Dec 2008
Application note 5 VIN solution using DCDC Controllers, a LDO, and a Digitally Prog. Sequencer 24 Nov 2008
More literature DaVinci Technology Overview Brochure (Rev. B) 27 Sep 2008
Application note Migrating from EDMA v2.0 to EDMA v3.0 TMS320C64X DSP (Rev. A) 21 Aug 2008
Application note Understanding the Davinci Preview Engine (Rev. A) 23 Jul 2008
Application note Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A) 17 Jul 2008
Application note Understanding the Davinci Resizer (Rev. B) 17 Jul 2008
Application note Implementing the DDR2 PCB Layout on the TMS320DM644x DMSoC (Rev. G) 16 Jun 2008
Application note Building a Small Embedded Linux Kernel Example (Rev. A) 27 May 2008
User guide TMS320DM644x DMSoC Multimedia Card (MMC)/Secure Digital (SD) Card Controller UG (Rev. D) 27 May 2008
User guide TMS320C6000 Assembly Language Tools v 6.1 User's Guide (Rev. Q) 15 May 2008
User guide TMS320C6000 Optimizing Compiler v 6.1 User's Guide (Rev. O) 15 May 2008
User guide TMS320C64x+ DSP Image/Video Processing Library (v2.0) Programmer's Reference (Rev. A) 05 May 2008
Application note TMS320DM6441 Power Consumption Summary Application Report 08 Apr 2008
User guide TMS320DM644x DMSoC Universal Asynchronous Receiver/Transmitter (UART) UG (Rev. A) 08 Apr 2008
User guide TMS320C64x+ DSP Little-Endian Library Programmer's Reference (Rev. B) 06 Mar 2008
Application note Creating a TMS320DM6446 Audio Encode Example Using XDC Tools (Rev. A) 26 Feb 2008
User guide TMS320DM644x DMSoC Enhanced Direct Memory Access (EDMA) Controller User's Guide (Rev. D) 25 Feb 2008
User guide TMS320DM644x DMSoC VLYNQ Port User's Guide (Rev. A) 20 Sep 2007
User guide TMS320DM644x DMSoC Audio Serial Port (ASP) User's Guide (Rev. B) 17 Sep 2007
Application note Decode Demo for the DaVinci DVEVM/DVSDK 1.2 (Rev. A) 27 Jun 2007
Application note Encode Demo for the DaVinci DVEVM/DVSDK 1.2 (Rev. A) 27 Jun 2007
Application note EncodeDecode Demo for the DaVinci DVEVM/DVSDK 1.2 (Rev. A) 27 Jun 2007
User guide TMS320DM644x DMSoC Peripherals Overview Reference Guide (Rev. C) 18 Apr 2007
EVM User's guide TMS320DM644x DVEVM Windows CE v5.0 BSP Codec Engine User’s Guide 23 Mar 2007
EVM User's guide TMS320DM644x DVEVM Windows CE v5.0 Codec Engine Binary User's Guide 23 Mar 2007
More literature DaVinci Technology - Digital Video Innovation Product Bulletin (Rev. D) 13 Feb 2007
More literature Overview of DaVinci™ TMS320DM644x Digital Media Portfolio (Rev. B) 13 Feb 2007
User guide TMS320DM644x DMSoC Serial Peripheral Interface (SPI) User's Guide (Rev. A) 07 Feb 2007
Application note DaVinci Technology Background and Specifications (Rev. A) 04 Jan 2007
More literature DaVinci-Based Third Party Reference Design Simplifies Media Player Development 27 Dec 2006
Application note Basic Application Loading over the Serial Interface for the DaVinci TMS320DM644x 21 Dec 2006
More literature Portable Media Player Based on DaVinci Technology 14 Nov 2006
More literature Universal IP Player Solution from ATEME 02 Nov 2006
More literature TMS320DM6441 Product Bulletin 27 Oct 2006
More literature DaVinci Benchmarks Product Bulletin (Rev. A) 12 Sep 2006
Application note Fast Development with DaVinci On Screen Display (OSD) 06 Jul 2006
User guide TMS320C64x+ DSP Big-Endian Library Programmer's Reference 10 Mar 2006
User guide TMS320C64x+ Image/Video Processing Library Programmer's Reference 10 Mar 2006
Application note Migrating from EDMA v2.0 to EDMA v3.0 for TMS320DM644X DMSoC 03 Dec 2005
User guide TMS320DM644x DMSoC ATA Controller User's Guide 03 Dec 2005
User guide TMS320DM644x DMSoC DSP Subsystem Reference Guide 03 Dec 2005
Application note Migrating from TMS320C64x to TMS320C64x+ (Rev. A) 20 Oct 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Debug probe

TMDSEMU200-U — XDS200 USB Debug Probe

The XDS200 is a debug probe (emulator) used for debugging TI embedded devices.  The XDS200 features a balance of low cost with good performance as compared to the low cost XDS110 and the high performance XDS560v2.  It supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a (...)

Not available on TI.com
Debug probe

TMDSEMU560V2STM-U — XDS560™ software v2 system trace USB debug probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com
Debug probe

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB & Ethernet Debug Probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com
Software development kit (SDK)

LINUXDVSDK-DV200 Linux DVSDK (v2.00) for DM644x and DM646x - PRODUCTION

Effective Oct 2010 - Linux DVSDK v4 has been released. For DaVinci™ devices not listed above, search TI.com for your device part number; This product page will have a link to your current DVSDK.

The Linux™ Digital Video Software Development Kits (DVSDKs) enable DaVinci system integrators to (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip
Download options
Software development kit (SDK)

LINUXDVSDK-DV310 Linux DVSDK (v3.10) for DM6467T and DM355 - PRODUCTION

Effective Oct 2010 - Linux DVSDK v4 has been released. For DaVinci™ devices not listed above, search TI.com for your device part number; This product page will have a link to your current DVSDK.

The Linux™ Digital Video Software Development Kits (DVSDKs) enable DaVinci system integrators to (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip
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Application software & framework

TMDMFP — Multimedia Framework Products (MFP) - Codec Engine, Framework Components and XDAIS

Multimedia Framework Products (MFP)

A major advantage of programmable signal processors over fixed-function devices is their ability to accelerate multiple multimedia functions and provide flexible environments to enable user customization. However, sharing scarce embedded hardware resources between (...)

Driver or library

AEC-AER Acoustic echo cancellation/removal for TI C64x+, C674x, C55x and Cortex®-A8 processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware

Supported products & hardware

Products
Arm-based processors
66AK2G12 High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6201-EP Enhanced product C6201 fixed point DSP SM320C6415 Military grade C64x fixed point DSP SM320C6415-EP Enhanced product C6415 fixed point DSP SM320C6424-EP Enhanced product C6424 fixed point DSP SM320C6455-EP Enhanced product C6455 fixed point DSP SM320C6472-HIREL High reliability product 6 Core C6472 fixed point DSP SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP SM320C6701 Single core C67x floating-point DSP for military applications - up to 167MHz SM320C6701-EP Enhanced product C6701 floating-point DSP SM320C6711D-EP Enhanced product C6711D floating-point DSP SM320C6712D-EP Enhanced product C6712D DSP SM320C6713B-EP Enhanced product C6713 floating-point DSP SM320C6727B Military grade C6727B floating-point DSP SM320C6727B-EP Enhanced product C6727 floating-point DSP SM320DM642-HIREL High reliability product digital media DM642 DSP SM32C6416T-EP Enhanced product C6416T fixed point DSP SMJ320C6201B Fixed Point Digital Signal Processor, Military SMJ320C6203 Military grade C62x fixed point DSP - ceramic package SMJ320C6415 Military grade C64x fixed point DSP - ceramic package SMJ320C6701 Military grade C67x floating-point DSP - ceramic package SMJ320C6701-SP Space grade C6701 floating-point DSP - rad-tolerant class V with ceramic package SMV320C6727B-SP Space grade C6727B floating-point DSP - rad-tolerant class V with ceramic package TMS320C5517 Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C5532 Low power C55x fixed point DSP- up to 100MHz TMS320C5533 Low power C55x fixed point DSP- up to 100MHz, USB TMS320C5534 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface TMS320C5535 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C6201 Fixed-Point Digital Signal Processor TMS320C6202 Fixed-Point Digital Signal Processor TMS320C6202B C62x fixed point DSP- up to 300MHz, 384KB TMS320C6203B C62x fixed point DSP- up to 300MHz, 896KB TMS320C6204 Fixed-Point Digital Signal Processor TMS320C6205 Fixed-Point Digital Signal Processor TMS320C6211B C62x fixed point DSP- up to 167MHz TMS320C6411 C64x fixed point DSP- up to 300MHz, McBSP TMS320C6414 C64x fixed point DSP- up to 720MHz, McBSP TMS320C6415 C64x fixed point DSP- up to 720MHz, McBSP, PCI TMS320C6416 C64x fixed point DSP- up to 720MHz, McBSP, PCI, VCP/TCP TMS320C6421Q C64x+ fixed point DSP- up to 600MHz, 8 Bit EMIFA, 16-Bit DDR2 TMS320C6424Q C64x+ fixed point DSP- up to 600MHz, 16/8-Bit EMIFA, 32/16 Bit DDR2 TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6701 C67x floating-point DSP- up to 167MHz, McBSP TMS320C6711D C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA TMS320C6712D C67x floating-point DSP- up to 150MHz, McBSP, 16-Bit EMIFA TMS320C6720 C67x floating-point DSP - 200MHz, McASP, 16-Bit EMIFA TMS320C6722B C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA TMS320C6726B C67x floating-point DSP- up to 266MHz, McASP, 16-Bit EMIFA TMS320C6727 C67x floating-point DSP- up to 250MHz, McASP, 32-Bit EMIFA TMS320C6727B C67x floating-point DSP- up to 350MHz, McASP, 32-Bit EMIFA TMS320C6743 Low power C674x floating-point DSP- 375MHz TMS320C6745 Low power C674x floating-point DSP- 456MHz, QFP TMS320C6747 Low power C674x floating-point DSP- 456MHz, PBGA TMS320DM642Q Video/imaging fixed-point digital signal processor TMS320DM6431Q Digital media processor, up to 2400 MIPS, 300 MHz clock rate TMS320DM6435Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 1 McBSP TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip TMS320DM647 Digital Media Processor
Download options
Driver or library

FAXLIB FAX library (FAXLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware

Supported products & hardware

Products
Arm-based processors
66AK2G12 High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6201-EP Enhanced product C6201 fixed point DSP SM320C6415 Military grade C64x fixed point DSP SM320C6415-EP Enhanced product C6415 fixed point DSP SM320C6424-EP Enhanced product C6424 fixed point DSP SM320C6455-EP Enhanced product C6455 fixed point DSP SM320C6472-HIREL High reliability product 6 Core C6472 fixed point DSP SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP SM320C6701 Single core C67x floating-point DSP for military applications - up to 167MHz SM320C6701-EP Enhanced product C6701 floating-point DSP SM320C6711D-EP Enhanced product C6711D floating-point DSP SM320C6712D-EP Enhanced product C6712D DSP SM320C6713B-EP Enhanced product C6713 floating-point DSP SM320C6727B Military grade C6727B floating-point DSP SM320C6727B-EP Enhanced product C6727 floating-point DSP SM320DM642-HIREL High reliability product digital media DM642 DSP SM32C6416T-EP Enhanced product C6416T fixed point DSP SMJ320C6201B Fixed Point Digital Signal Processor, Military SMJ320C6203 Military grade C62x fixed point DSP - ceramic package SMJ320C6415 Military grade C64x fixed point DSP - ceramic package SMJ320C6701 Military grade C67x floating-point DSP - ceramic package SMJ320C6701-SP Space grade C6701 floating-point DSP - rad-tolerant class V with ceramic package SMV320C6727B-SP Space grade C6727B floating-point DSP - rad-tolerant class V with ceramic package TMS320C5517 Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C5532 Low power C55x fixed point DSP- up to 100MHz TMS320C5533 Low power C55x fixed point DSP- up to 100MHz, USB TMS320C5534 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface TMS320C5535 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C6201 Fixed-Point Digital Signal Processor TMS320C6202 Fixed-Point Digital Signal Processor TMS320C6202B C62x fixed point DSP- up to 300MHz, 384KB TMS320C6203B C62x fixed point DSP- up to 300MHz, 896KB TMS320C6204 Fixed-Point Digital Signal Processor TMS320C6205 Fixed-Point Digital Signal Processor TMS320C6211B C62x fixed point DSP- up to 167MHz TMS320C6411 C64x fixed point DSP- up to 300MHz, McBSP TMS320C6414 C64x fixed point DSP- up to 720MHz, McBSP TMS320C6415 C64x fixed point DSP- up to 720MHz, McBSP, PCI TMS320C6416 C64x fixed point DSP- up to 720MHz, McBSP, PCI, VCP/TCP TMS320C6421Q C64x+ fixed point DSP- up to 600MHz, 8 Bit EMIFA, 16-Bit DDR2 TMS320C6424Q C64x+ fixed point DSP- up to 600MHz, 16/8-Bit EMIFA, 32/16 Bit DDR2 TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6701 C67x floating-point DSP- up to 167MHz, McBSP TMS320C6711D C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA TMS320C6712D C67x floating-point DSP- up to 150MHz, McBSP, 16-Bit EMIFA TMS320C6720 C67x floating-point DSP - 200MHz, McASP, 16-Bit EMIFA TMS320C6722B C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA TMS320C6726B C67x floating-point DSP- up to 266MHz, McASP, 16-Bit EMIFA TMS320C6727 C67x floating-point DSP- up to 250MHz, McASP, 32-Bit EMIFA TMS320C6727B C67x floating-point DSP- up to 350MHz, McASP, 32-Bit EMIFA TMS320C6743 Low power C674x floating-point DSP- 375MHz TMS320C6745 Low power C674x floating-point DSP- 456MHz, QFP TMS320C6747 Low power C674x floating-point DSP- 456MHz, PBGA TMS320DM642Q Video/imaging fixed-point digital signal processor TMS320DM6431Q Digital media processor, up to 2400 MIPS, 300 MHz clock rate TMS320DM6435Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 1 McBSP TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip TMS320DM647 Digital Media Processor
Download options
Driver or library

SPRC122 — C62x/C64x Fast Run-Time Support (RTS) Library

The C62x/64x FastRTS Library is an optimized, floating-point function library for C programmers using either TMS320C62x or TMS320C64x devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By replacing the current (...)
Driver or library

SPRC831 — Video Imaging Co-Processor (VICP) Signal Processing Library

Texas Instruments VICP Signal processing library is a collection of highly tuned SW algorithms that execute on the VICP H/W accelerator. The library allows the application developer to effectively utilize the VICP performance without spending significant time in developing software for the (...)
Driver or library

VOLIB Voice library (VoLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware

Supported products & hardware

Products
Arm-based processors
66AK2G12 High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6201-EP Enhanced product C6201 fixed point DSP SM320C6415 Military grade C64x fixed point DSP SM320C6415-EP Enhanced product C6415 fixed point DSP SM320C6424-EP Enhanced product C6424 fixed point DSP SM320C6455-EP Enhanced product C6455 fixed point DSP SM320C6472-HIREL High reliability product 6 Core C6472 fixed point DSP SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP SM320C6701 Single core C67x floating-point DSP for military applications - up to 167MHz SM320C6701-EP Enhanced product C6701 floating-point DSP SM320C6711D-EP Enhanced product C6711D floating-point DSP SM320C6712D-EP Enhanced product C6712D DSP SM320C6713B-EP Enhanced product C6713 floating-point DSP SM320C6727B Military grade C6727B floating-point DSP SM320C6727B-EP Enhanced product C6727 floating-point DSP SM320DM642-HIREL High reliability product digital media DM642 DSP SM32C6416T-EP Enhanced product C6416T fixed point DSP SMJ320C6201B Fixed Point Digital Signal Processor, Military SMJ320C6203 Military grade C62x fixed point DSP - ceramic package SMJ320C6415 Military grade C64x fixed point DSP - ceramic package SMJ320C6701 Military grade C67x floating-point DSP - ceramic package SMJ320C6701-SP Space grade C6701 floating-point DSP - rad-tolerant class V with ceramic package SMV320C6727B-SP Space grade C6727B floating-point DSP - rad-tolerant class V with ceramic package TMS320C5517 Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C5532 Low power C55x fixed point DSP- up to 100MHz TMS320C5533 Low power C55x fixed point DSP- up to 100MHz, USB TMS320C5534 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface TMS320C5535 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C6201 Fixed-Point Digital Signal Processor TMS320C6202 Fixed-Point Digital Signal Processor TMS320C6202B C62x fixed point DSP- up to 300MHz, 384KB TMS320C6203B C62x fixed point DSP- up to 300MHz, 896KB TMS320C6204 Fixed-Point Digital Signal Processor TMS320C6205 Fixed-Point Digital Signal Processor TMS320C6211B C62x fixed point DSP- up to 167MHz TMS320C6411 C64x fixed point DSP- up to 300MHz, McBSP TMS320C6414 C64x fixed point DSP- up to 720MHz, McBSP TMS320C6415 C64x fixed point DSP- up to 720MHz, McBSP, PCI TMS320C6416 C64x fixed point DSP- up to 720MHz, McBSP, PCI, VCP/TCP TMS320C6421Q C64x+ fixed point DSP- up to 600MHz, 8 Bit EMIFA, 16-Bit DDR2 TMS320C6424Q C64x+ fixed point DSP- up to 600MHz, 16/8-Bit EMIFA, 32/16 Bit DDR2 TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6701 C67x floating-point DSP- up to 167MHz, McBSP TMS320C6711D C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA TMS320C6712D C67x floating-point DSP- up to 150MHz, McBSP, 16-Bit EMIFA TMS320C6720 C67x floating-point DSP - 200MHz, McASP, 16-Bit EMIFA TMS320C6722B C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA TMS320C6726B C67x floating-point DSP- up to 266MHz, McASP, 16-Bit EMIFA TMS320C6727 C67x floating-point DSP- up to 250MHz, McASP, 32-Bit EMIFA TMS320C6727B C67x floating-point DSP- up to 350MHz, McASP, 32-Bit EMIFA TMS320C6743 Low power C674x floating-point DSP- 375MHz TMS320C6745 Low power C674x floating-point DSP- 456MHz, QFP TMS320C6747 Low power C674x floating-point DSP- 456MHz, PBGA TMS320DM642Q Video/imaging fixed-point digital signal processor TMS320DM6431Q Digital media processor, up to 2400 MIPS, 300 MHz clock rate TMS320DM6435Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 1 McBSP TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip TMS320DM647 Digital Media Processor
Download options
Software codec

C64XPLUSCODECSPCH Speech Codecs for C64x+-based Devices

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes are on (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320C6457 Communications infrastructure digital signal processor TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip
Download options
Software codec

C64XPLUSCODECSVID C64x+ Video Codecs - Software and Documentation

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes are on (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320C6457 Communications infrastructure digital signal processor TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip
Download options
Software codec

DM644XCODECS Codecs for DM644x - Software and Documentation

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into audio, video and voice applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes (...)

Supported products & hardware

Supported products & hardware

Products
Unassigned processors
Digital signal processors (DSPs)
SM320DM6446-HIREL High reliability product digital media DM6446 processor TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6443 DaVinci Digital Media System-on-Chip TMS320DM6446 DaVinci Digital Media System-on-Chip
Download options
Software codec

TMDXDAISXDM — eXpressDSP Algorithm Standard – xDAIS Developer’s Kit and xDM

xDAIS and xDM

The eXpressDSP™ Algorithm Interoperability Standard (xDAIS) and the eXpressDSP Digital Media (xDM) standard fully leverage the ability of DSPs to perform a wide range of multimedia functions on a single device. eXpressDSP compliance is achieved by adhering to these standards. To (...)

Simulation model

DM6441 ZWT IBIS Model

SPRM345.ZIP (112 KB) - IBIS Model
Simulation model

DM6441 ZWT Rev. 1 BSDL Model

SPRM330.ZIP (8 KB) - BSDL Model
Simulation model

DM6441 ZWT Rev. 2 BSDL Model

SPRM331.ZIP (8 KB) - BSDL Model
Design tool

PROCESSORS-3P-SEARCH — Arm®-based MPU, Arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
Package Pins Download
NFBGA (ZWT) 361 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
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