TPS7A84

現行

具有高準確度且具有電源良好功能的 3-A、低 VIN、低雜訊、超低壓差電壓穩壓器

現在提供此產品的更新版本

open-in-new 比較替代產品
具備升級功能,可直接投入使用替代所比較的產品
TPS7A84A 現行 具有電源良好功能的 3-A、低 VIN (1.1-V)、低雜訊、高準確度、超低壓差電壓穩壓器 3-A LDO with improved accuracy 0.75%. This is an improved pin-to-pin upgrade.
功能相似於所比較的產品
TPS7A88 現行 1-A、低雜訊、高 PSRR、雙通道可調式超低壓降電壓穩壓器 Dual-channel, low noise, 1-A LDO.

產品詳細資料

Output options Adjustable Output, Fixed Output Iout (max) (A) 3 Vin (max) (V) 6.5 Vin (min) (V) 1.1 Vout (max) (V) 5 Vout (min) (V) 0.8 Noise (µVrms) 4.4 Iq (typ) (mA) 2.8 Thermal resistance θJA (°C/W) 43.4 Rating Catalog Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Output discharge, Power good, Soft start Accuracy (%) 1 PSRR at 100 KHz (dB) 25 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Fixed Output Iout (max) (A) 3 Vin (max) (V) 6.5 Vin (min) (V) 1.1 Vout (max) (V) 5 Vout (min) (V) 0.8 Noise (µVrms) 4.4 Iq (typ) (mA) 2.8 Thermal resistance θJA (°C/W) 43.4 Rating Catalog Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Output discharge, Power good, Soft start Accuracy (%) 1 PSRR at 100 KHz (dB) 25 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
VQFN (RGR) 20 12.25 mm² 3.5 x 3.5
  • Low dropout: 180 mV (max) at 3 A
  • 1% (max) accuracy over line, load, and temperature
  • Output voltage noise:
    • 4.4 µVRMS at 0.8-V output
    • 7.7 µVRMS at 5.0-V output
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • ANY-OUT™ operation:
    • Output voltage range: 0.8 V to 3.95 V
  • Adjustable operation:
    • Output voltage range: 0.8 V to 5.0 V
  • Power-supply ripple rejection:
    • 40 dB at 500 kHz
  • Excellent load transient response
  • Adjustable soft-start in-rush control
  • Open-drain power-good (PG) output
  • Stable with a 47-µF or larger ceramic output capacitor
  • 3.5-mm × 3.5-mm, 20-pin VQFN
  • Low dropout: 180 mV (max) at 3 A
  • 1% (max) accuracy over line, load, and temperature
  • Output voltage noise:
    • 4.4 µVRMS at 0.8-V output
    • 7.7 µVRMS at 5.0-V output
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • ANY-OUT™ operation:
    • Output voltage range: 0.8 V to 3.95 V
  • Adjustable operation:
    • Output voltage range: 0.8 V to 5.0 V
  • Power-supply ripple rejection:
    • 40 dB at 500 kHz
  • Excellent load transient response
  • Adjustable soft-start in-rush control
  • Open-drain power-good (PG) output
  • Stable with a 47-µF or larger ceramic output capacitor
  • 3.5-mm × 3.5-mm, 20-pin VQFN

The TPS7A84 is a low-noise (4.4 µVRMS), low-dropout linear regulator (LDO) capable of sourcing 3 A with only 180 mV of maximum dropout. The device output voltage is pin-programmable from 0.8 V to 3.95 V and adjustable from 0.8 V to 5.0 V using an external resistor divider.

The combination of low-noise (4.4 µVRMS), high PSRR, and high output current capability makes the TPS7A84 ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A84 limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and 5.0-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A84 ensure optimal system performance.

The versatility of the TPS7A84 makes the device a component of choice for many demanding applications.

The TPS7A84 is a low-noise (4.4 µVRMS), low-dropout linear regulator (LDO) capable of sourcing 3 A with only 180 mV of maximum dropout. The device output voltage is pin-programmable from 0.8 V to 3.95 V and adjustable from 0.8 V to 5.0 V using an external resistor divider.

The combination of low-noise (4.4 µVRMS), high PSRR, and high output current capability makes the TPS7A84 ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A84 limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and 5.0-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A84 ensure optimal system performance.

The versatility of the TPS7A84 makes the device a component of choice for many demanding applications.

下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
功能相似於所比較的產品
TPS74401 現行 3-A、低 VIN (0.8-V)、低雜訊、高 PSRR、可調式超低壓降電壓穩壓器 An alternative 3-A LDO.

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 7
類型 標題 日期
* Data sheet TPS7A84 High-Current (3 A), High-Accuracy (1%), Low-Noise (4.4 µVRMS), LDO Voltage Regulator datasheet (Rev. B) PDF | HTML 2021年 6月 23日
White paper Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 2022年 12月 14日
White paper Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 2022年 12月 13日
Analog Design Journal Clutter‐free power supplies for RF converters in radar applications (Part 1)  2021年 3月 18日
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 2018年 3月 21日
Technical article Optimizing LDO voltage accuracy PDF | HTML 2016年 5月 6日
EVM User's guide TPS7A84EVM-753 Evaluation Module 2016年 2月 29日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TPS7A84EVM-753 — TPS7A84 3A 高電流、1% 高準確度、4.4μVRMS LDO 穩壓器評估模組

The TPS7A84EVM-753 evaluation module is designed for a typical configuration to evaluate the operation and performance of the TPS7A84, High-Current 3-A low dropout voltage regulator. The EVM circuit board is configured to be a reference design for engineering applications requiring current to a (...)
使用指南: PDF
TI.com 無法提供
模擬型號

TPS7A84 PSpice Transient Model

SBVM575.ZIP (76 KB) - PSpice Model
模擬型號

TPS7A84 Unencrypted PSpice Transient Model

SBVM574.ZIP (3 KB) - PSpice Model
計算工具

PARALLEL-LDO-CALC Parallel low-dropout (LDO) calculator

The parallel low-dropout (LDO) calculator is a Microsoft® Excel®-based tool that provides worst-case analysis for parallel LDO regulators using ballast resistors. The tool helps the user identify the minimum number of parallel LDO regulators required and optimum ballast resistance for a (...)

支援產品和硬體

支援產品和硬體

產品
線性與低壓差 (LDO) 穩壓器
TPS7A33 具啟用功能的 1A、高 PSRR、負可調式超低壓差電壓穩壓器 TPS7A47 具啟用功能的 1-A、36-V、低雜訊、高 PSRR、低壓差電壓穩壓器 TPS7A47-Q1 具有啟用功能的汽車 1-A、36-V、低雜訊、高 PSRR、低壓差電壓穩壓器 TPS7A4701-EP 強化型 36-V、1-A、4-μVRMS、RF LDO 電壓穩壓器 TPS7A52 2-A、低 VIN (1.1-V)、低雜訊、高準確度、超低壓差 (LDO) 電壓穩壓器 TPS7A52-Q1 車用 2-A、低 VIN (1.1-V)、低雜訊、高準確度、低壓降 (LDO) 電壓穩壓器 TPS7A53 3-A、低輸入電壓 (1.1 V) 低雜訊高準確度超低壓差 (LDO) 電壓穩壓器 TPS7A53-Q1 車用 3-A、低 VIN (1.1 V)、低雜訊、高準確度、低壓降 (LDO) 電壓穩壓器 TPS7A53A-Q1 車用 3-A、低 VIN 5.6-µVRMS 低雜訊高準確度低壓降電壓穩壓器 TPS7A53B 具有 0.5-V 低 VREF 的 3-A , 1.1-V ,低 VIN ,低雜訊高準確度超低壓差電壓穩壓器 TPS7A54 4-A、低 VIN (1.1-V)、低雜訊、高準確度、超低壓差 (LDO) 電壓穩壓器 TPS7A54-Q1 車用 4-A、低 VIN (1.1-V)、低雜訊、高準確度、低壓差 (LDO) 電壓穩壓器 TPS7A57 5-A、低輸入電壓、低雜訊、高準確度、低壓差 (LDO) 電壓穩壓器 TPS7A83A 具有電源良好功能的 2-A、低 VIN (1.1-V)、低雜訊、高準確度、超低壓差電壓穩壓器 TPS7A84A 具有電源良好功能的 3-A、低 VIN (1.1-V)、低雜訊、高準確度、超低壓差電壓穩壓器 TPS7A85A 具有電源良好功能的 4-A、低 VIN (1.1-V)、低雜訊、高準確度、超低壓差電壓穩壓器 TPS7A94 1-A、超低雜訊、超高 PSRR、射頻電壓穩壓器 TPS7B7702-Q1 汽車 300-mA、無電池 (40-V)、雙通道可調整天線低壓差電壓穩壓器 TPS7A8300 2-A、低 VIN、低 2-A、低 VIN、低雜訊、超低壓降電壓穩壓器具有高準確度、低雜訊的良好電源,超低壓降電壓穩壓器具有高準確度的良好電源 TPS7A84 具有高準確度且具有電源良好功能的 3-A、低 VIN、低雜訊、超低壓差電壓穩壓器 TPS7A85 具有高準確度且具有電源良好功能的 4-A、低 VIN、低雜訊、超低壓差電壓穩壓器 TPS7A96 2-A、超低雜訊、超高 PSRR 射頻電壓穩壓器 TPS7A4501-SP 抗輻射、QMLV、1.5-V 至 20-V 輸入 1.5-A 低壓降 (LDO) 穩壓器 TPS7H1111-SP 抗輻射、QMLV 和 QMLP、1.5-A、超低雜訊高 PSRR 低壓降 (LDO) 穩壓器 TPS7H1111-SEP 耐輻射、1.5-A、超低雜訊、超高 PSRR RF LDO 穩壓器
硬體開發
開發板
TPS7A57EVM-081 適用於 5-A 低雜訊高準確度低壓差 (LDO) 電壓穩壓器的 TPS7A57 評估模組
參考設計

TIDA-01466 — 適用於超音波前端的低電壓、低雜訊電源參考設計

This reference design is a power supply optimized specifically for providing power to eight 16-channel receive AFE ICs for ultrasound imaging systems. This design reduces part count while maximizing efficiency by using single-chip DC-DC converter + LDO combo regulators to set the LDO input just (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01022 — 適用於 DSO、雷達和 5G 無線測試系統的靈活 3.2-GSPS 多通道 AFE 參考設計

This high speed multi-channel data capture reference design enables optimum system performance. System designers needs to consider critical design parameters like clock jitter and skew for high speed multi-channel clock generation, which affects overall system SNR, SFDR, channel to channel skew (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01027 — 在 12.8 GSPS 資料採集系統中發揮最大效能的低雜訊電源供應參考設計

This reference design demonstrates an efficient, low-noise five-rail power supply design for very high-speed Data Acquisition (DAQ) systems capable of > 12.8 GSPS. The power supply DC/DC converters are frequency-synchronized and phase-shifted in order to minimize input current ripple and (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01028 — 適用於高速示波器和寬頻帶數位器的 12.8-GSPS 類比前端參考設計

This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is done by time interleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-010128 — 適用於 12 位元數位器的可擴充 20.8 GSPS 參考設計

This reference design describes a 20.8 GSPS sampling system using RF sampling analog-to-digital converters (ADCs) in time interleaved configuration. Time interleaving method is a proven and traditional way of increasing sample rate, however, matching individual ADCs offset, gain and sampling time (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-010122 — 適用於多通道射頻系統的參考設計同步數據轉換器 DDC 和 NCO 功能

此參考設計可解決與新興 5G 適配應用相關,例如大規模多輸入多輸出 (mMIMO)、相位陣列雷達與通訊酬載等應用相關的同步設計挑戰。一般 RF 前端包含天線、低雜訊放大器 (LNA)、混波器、類比網域中的本地振盪器 (LO) 及類比轉數位轉換器、數值控制振盪器 (NCO) 和數位降轉換器 (DDC)。為了達到整體系統同步化,這些數位區塊必須與系統時鐘同步。本參考設計採用 ADC12DJ3200 資料轉換器,透過同步處理晶片內建 NCO 與 SYNC ~ 並使用無雜訊孔徑延遲調整 (tAD 調整) 功能,在多個接收器之間達到小於 5-ps 的頻道間偏斜的效果,以進一步降低偏斜。此設計也具備搭載 (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01232 — 高電流低雜訊並聯 LDO 參考設計

This parallel low-dropout (LDO) reference design showcases the TPS7A85 low-noise LDO linear regulator in a parallel configuration, which is capable of sourcing 3.5 A per LDO or 7 A per board. Additional design flexibility includes the ability to stack this design to meet the current (...)
Design guide: PDF
電路圖: PDF
封裝 引腳 下載
VQFN (RGR) 20 檢視選項

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片