12-Bit, 2.7 GSPS RF sampling ADC with JESD204B interface - ADC12J2700

ADC12J2700 (ACTIVE)

12-Bit, 2.7 GSPS RF sampling ADC with JESD204B interface

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Description

The ADC12J1600 and ADC12J2700 devices are wideband sampling and digital tuning devices. Texas Instruments’ giga-sample analog-to-digital converter (ADC) technology enables a large block of frequency spectrum to be sampled directly at RF. An integrated DDC (Digital Down Converter) provides digital filtering and down-conversion. The selected frequency block is made available on a JESD204B serial interface. Data is output as baseband 15-bit complex information for ease of downstream processing. Based on the digital down-converter (DDC) decimation and link output rate settings, this data is output on 1 to 5 lanes of the serial interface.

A DDC bypass mode allows the full rate 12-bit raw ADC data to also be output. This mode of operation requires 8 lanes of serial output.

The ADC12J1600 and ADC12J2700 devices are available in a 68-pin VQFN package. The device operates over the Industrial (–40°C ≤ TA ≤ 85°C) ambient temperature range.

Features

  • Excellent Noise and Linearity up to and
    beyond FIN = 3 GHz
  • Configurable DDC
  • Decimation Factors from 4 to 32
    (Complex Baseband Out)
  • Bypass Mode for Full Nyquist Output
    Bandwidth
  • Usable Output Bandwidth of 540 MHz at
    4x Decimation and 2700 MSPS
  • Usable Output Bandwidth of 320 MHz at
    4x Decimation and 1600 MSPS
  • Usable Output Bandwidth of 67.5 MHz at
    32x Decimation and 2700 MSPS
  • Usable Output Bandwidth of 40 MHz at
    32x Decimation and 1600 MSPS
  • Low Pin-Count JESD204B Subclass 1 Interface
  • Automatically Optimized Output Lane Count
  • Embedded Low Latency Signal Range Indication
  • Low Power Consumption
  • Key Specifications
    • Max Sampling Rate: 1600 or 2700 MSPS
    • Min Sampling Rate: 1000 MSPS
    • DDC Output Word Size: 15-Bit Complex
      (30 bits total)
    • Bypass Output Word Size: 12-Bit Offset Binary
    • Noise Floor: –147.3 dBFS/Hz (ADC12J2700)
    • Noise Floor: –145 dBFS/Hz (ADC12J1600)
    • IMD3: −64 dBc (FIN = 2140 MHz ± 30 MHz
      at −13 dBFS)
    • FPBW (–3 dB): 3.2 GHz
    • Peak NPR: 46 dB
    • Supply Voltages: 1.9 V and 1.2 V
    • Power Consumption
      • Bypass (2700 MSPS): 1.8 W
      • Bypass (1600 MSPS): 1.6 W
      • Power Down Mode: <50 mW

View more

Parametrics Compare all products in High Speed ADC (>=1GSPS)

 
Resolution (Bits)
SNR (dB)
Architecture
Interface
Analog Input BW (MHz)
Pin/Package
SFDR (dB)
# Input Channels
Sample Rate (max) (SPS)
Approx. Price (US$)
Operating Temperature Range (C)
Rating
Reference Mode
ADC12J2700 ADC12J1600 ADC12J4000
12     12     12    
55     55     55    
Folding Interpolating     Folding Interpolating     Folding Interpolating    
JESD204B     JESD204B     JESD204B    
3300     3300     3300    
68VQFN     68VQFN     68VQFN    
71     70     71    
1     1     1    
2.7GSPS     1.6GSPS     4GSPS    
950.97 | 100u     682.96 | 100u     1949.99 | 100u    
-40 to 85     -40 to 85     -40 to 85    
Catalog     Catalog     Catalog    
Int     Int     Int    

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