ADS58J63 Quad Channel 14-bit 500 Msps Telecom Receiver IC | TI.com

ADS58J63 (ACTIVE)

Quad Channel 14-bit 500 Msps Telecom Receiver IC

 

Recommended alternative parts

  • ADS58J64  - The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device.   Quad-Channel, 14-Bit, 1-GSPS Telecom Receiver and Feedback IC

Description

The ADS58J63 is a low-power, wide-bandwidth, 14-bit, 500-MSPS, quad-channel, telecom receiver device. The ADS58J63 supports a JESD204B serial interface with data rates up to 10 Gbps with one lane per channel. The buffered analog input provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. The ADS58J63 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption. The digital signal processing block includes complex mixers followed by low-pass filters with decimate-by-2 and -4 options supporting up to 200-MHz receive bandwidth. The ADS58J63 also supports a 14-bit, 500-MSPS output in burst-mode making the device suitable for a DPD observation receiver.

The JESD204B interface reduces the number of interface lines, thus allowing high system integration density. An internal phase locked loop (PLL) multiplies the incoming analog-to-digital converter (ADC) sampling clock to derive the bit clock, which is used to serialize the 14-bit data from each channel.

Features

  • Quad Channel
  • 14-Bit Resolution
  • Maximum Clock Rate: 500 MSPS
  • Input Bandwidth (3 dB): 900 MHz
  • On-Chip Dither
  • Analog Input Buffer with High-Impedance Input
  • Output Options:
    • Rx: Decimate-by-2 and -4 Options with Low-
      Pass Filter
    • 200-MHz Complex Bandwidth or 100-MHz
      Real Bandwidth Support
    • DPD FB: Burst Mode with 14-Bit Output
  • 1.9-VPP Differential Full-Scale Input
  • JESD204B Interface:
    • Subclass 1 Support
    • 1 Lane per ADC Up to 10 Gbps
    • Dedicated SYNC pin for pair of channels
  • Support for Multi-Chip Synchronization
  • 72-Pin VQFN Package (10 mm × 10 mm)
  • Key Specifications:
    • Power Dissipation: 675 mW/ch
    • Spectral Performance (Un-decimated)
      • fIN = 190 MHz IF at –1 dBFS:
        • SNR: 70.4 dBFS
        • NSD: –154.4 dBFS/Hz
        • SFDR: 86 dBc (HD2, HD3),
          95 dBFS (non HD2, HD3)
      • fIN = 370 MHz IF at –3 dBFS:
        • SNR: 68.5 dBFS
        • NSD: –152.5 dBFS/Hz
        • SFDR: 81 dBc (HD2, HD3),
          86 dBFS (non HD2, HD3)

Parametrics

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Part number Order Number of input channels Resolution (Bits) Sample rate (Max) (MSPS) Features Analog input BW (MHz) SFDR (Typ) (dB) SNR (Typ) (dB) Power consumption (Typ) (mW) Logic voltage DV/DD (Max) (V) Logic voltage DV/DD (Min) (V) Analog voltage AVDD (Max) (V) Analog voltage AVDD (Min) (V) Operating temperature range (C)
ADS58J63 Order now 4     14     500     Decimating Filter
Differential Inputs
High Dynamic Range
Nap Mode
Out of Range Indicator
Power Down    
900     89     70.8     2700     2     1.8     2     1.8     -40 to 85    
ADS58J64 Order now 4     14     1000     Decimating Filter
Differential Inputs
High Dynamic Range
Nap Mode
Out of Range Indicator
Power Down    
1000     88     69.6     2500     1.2     1.1     2     1.8     -40 to 85