ADS42JB49 Dual-Channel, 14-Bit, 250-MSPS Analog-to-Digital Converter (ADC) | TI.com

ADS42JB49 (ACTIVE) Dual-Channel, 14-Bit, 250-MSPS Analog-to-Digital Converter (ADC)

 

Description

The ADS42JB69 and ADS42JB49 are high-linearity, dual-channel, 16- and 14-bit, 250-MSPS, analog-to-digital converters (ADCs). These devices support the JESD204B serial interface with data rates up to
3.125 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy making it easy to drive analog inputs up to very high input frequencies. A sampling clock divider allows more flexibility for system clock architecture design. The devices employ internal dither algorithms to provide excellent spurious-free dynamic range (SFDR) over a large input frequency range.

For all available packages, see the orderable addendum at the end of the datasheet.

Features

  • Dual-Channel ADCs
  • 14- and 16-Bit Resolution
  • Maximum Clock Rate: 250 MSPS
  • JESD204B Serial Interface
    • Subclass 0, 1, 2 Compliant
    • Up to 3.125 Gbps
    • Two and Four Lanes Support
  • Analog Input Buffer with High-Impedance Input
  • Flexible Input Clock Buffer:
    Divide-by-1, -2, and -4
  • Differential Full-Scale Input: 2 VPP and 2.5 VPP
    (Register Programmable)
  • Package: 9-mm × 9-mm VQFN-64
  • Power Dissipation: 850 mW/Ch
  • Aperture Jitter: 85 fS rms
  • Internal Dither
  • Channel Isolation: 100 dB
  • Performance:
    • fIN = 170 MHz at 2 VPP, –1 dBFS
      • SNR: 73.3 dBFS
      • SFDR: 93 dBc for HD2, HD3
      • SFDR: 100 dBc for Non HD2, HD3
    • fIN = 170 MHz at 2.5 VPP, –1 dBFS
      • SNR: 74.7 dBFS
      • SFDR: 89 dBc for HD2, HD3 and
        95 dBc for Non HD2, HD3

Parametrics

Compare all products in High-speed ADCs (>10MSPS) Email Download to Excel
Part number Order Sample rate (Max) (MSPS) Features Resolution (Bits) Number of input channels SNR (dB) ENOB (Bits) SFDR (dB) Power consumption (Typ) (mW) Input range (Vp-p) Interface Operating temperature range (C) Analog input BW (MHz) Input buffer Package Group Package size: mm2:W x L (PKG) Rating Architecture
ADS42JB49 Order now 250     High Performance     14     2     75     12.1     95     1700     2.5     JESD204B     -40 to 85     900     Yes     VQFN | 64     64VQFN: 81 mm2: 9 x 9 (VQFN | 64)     Catalog     Pipeline    
ADS42JB46 Samples not available 160     High Performance     14     2     75.2     12.2     96     1360     2.5     JESD204B     -40 to 85     900     Yes     VQFN | 64     64VQFN: 81 mm2: 9 x 9 (VQFN | 64)     Catalog     Pipeline    
ADS42JB69 Samples not available 250     High Performance     16     2     75.9     12.3     95     1700     2.5     JESD204B     -40 to 85     900     Yes     VQFN | 64     64VQFN: 81 mm2: 9 x 9 (VQFN | 64)     Catalog     Pipeline    
ADS42LB49 Samples not available 250     High Performance     14     2     74.9     12     90     1640     2.5     DDR LVDS
QDR LVDS    
-40 to 85     900     Yes     VQFN | 64     64VQFN: 81 mm2: 9 x 9 (VQFN | 64)     Catalog     Pipeline    
ADS42LB69 Samples not available 250     High Performance     16     2     75.8     12.2     90     1640     2.5     DDR LVDS
QDR LVDS    
-40 to 85     900     Yes     VQFN | 64     64VQFN: 81 mm2: 9 x 9 (VQFN | 64)     Catalog     Pipeline    
</