SPRUJ52C june 2022 – july 2023 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4VH-Q1 , TDA4VP-Q1
The MSMC has the following registers for interrupt control:
Each bit in these registers represents a single event or interrupt supported by MSMC, which generates only one interrupt. This is the null slave error interrupt (MSMC_NULL_SLAVE_ERROR). MSMC sets this event when routing a command through the MSMC null slave port which results in an unsuccessful response status. Commands failing firewall checks do not trigger the null slave error interrupt event in MSMC.